OBSSCircuit DescriptionV1.1010/02/94 20:07 CET.Component & analysis parameters of a circuit.TINA 7.0.80.267 SFB(c) Copyright 1993,94,95,96 DesignSoft Inc. All rights reserved. $Circuit$w? [Vamp]miny1=0 maxy1=0.4 divsy1=1 scaley1=0[All]minx1=0maxx1=1 divsx1=4 scalex1=0K>X#??ƚ|8"Ml"B|8" EMF>u  S*:RpMS Sans Serif"L"l"mmJLL"H" "m"" " "m+ \"\"(`" I\"(`(` ""d"wx"w 6"wwdv%  '%   TT AA LPT % RpArial0100000000000000000dv%  % RpArial; pY$0010303245970139308v! ,"2>2Z 0100000000000000000dv ϪtXzVhdv%  % %  % %  % %  % %  % %  % %  % %  % %  % %  % %  % %  % %  % % %  %   + M% %   + M% &%  6>>6>6% \\&%  6\  6 \\6 \\6 % %  6>>6>6% \\%  6\  6 \\6 \\6 % \\&%  6 % %  &%    T3lBAA3LpInput current (A) m3% %    TTU [/AAU LP0\ % ( \\%  6\gg6gss6s~~6~666666% &%    Td /AA LT250m  % ( %  66666666''6'3363% &%    Td7 V/AA7 LT500m W % ( >>%  6>II6IUU6U``6`kk6kvv6v6666% &%    Td /AA LT750m  % ( %  66666666  6 6% &%    TT /AA LP1  % (   %  6 % \\6\% %  &%    Td@%OAA@LTVamp  &@% %    Tp&PAA&LX12.02m Q% ( SS%  6\Z~Z~6\~ZrZr6\rZeZe6\eZYZY6\YXMXM6\MZAZA6\AZ5Z56\5Z(Z(6\(ZZ6\% &%    Td8PAA8LT1.00Q% ( SS%  6\% \\6\% %  &%    TdAALTVout % % ( %  &%    Tp& PAA& LX11.01m Q % ( SS%  6\ZZ6\ZZ6\ZZ6\ZZ6\XX6\ZZ6\ZZ6\ZZ6\ZZ6\% &%    Td8PAA8LT3.60Q% ( SS%  6\% % \\&%  6aa6ee6jj6nn6ss6ww6||6666~~6}}6{{6zz6yy6xx6vv6uu6tt6ss6rr6pp6oo6nn6mm6kk6jj6ii6hh6ff6ee6dd6cc6aa6``6__6^^6]]6 [ [6ZZ6YY6XX6VV6#U#U6'T'T6,S,S60Q0Q65P5P69O9O6>N>N6CMCM6GKGK6LJLJ6PIPI6UHUH6YFYF6^E^E6bDbD6gCgC6kAkA6p@p@6t?t?6y>y>6}<}<6;;6::6996886666556446336116006//6..6,,6++6**6))6''6&&6%%6$$6##6!!6  66666666  66666 % \\& %  6aa6ee6jj6nn6ss6ww6||66666666666666666666666666666666  66666##6''6,,6006556996>>6CC6GG6LL6PP6UU6YY6^^6bb6gg6kk6pp6tt6yy6}}6666666666666666666666666666666  66666 %  % % % C@C Arial _To simulate circuit select "Analysis" -> "DC Analysis" -> "DC Transfer Characterisitc" -> "OK"Symbol????333333??F@F ArialOver Current DetectionSymbol????333333??%!0000%x xx %0x00x!P0P0)``!!88%8p(8p8p(%pPppP%888!8888%@ P@ P P!P8P8!8H8H!xx!%(H(HH!HPHP%   %%%!    %  !xxxx!     9R1T_075DB81020170530161130R_AX600_W200 (R)?@?Y@ 9pR2T_075DB23020170530161130R_AX600_W200 (R)@@?Y@ 9 R6T_075DAC5020170530161130R_AX600_W200 (R)j@@?Y@ 9PR7T_075DA67020170530161130R_AX600_W200 (R)@@?Y@ 9R8T_075DA09020170530161130R_AX600_W200 (R)j@@?Y@9ILoadT_075D94D020170530161130?.AD9 V1T_075D8EF020170530161130Battery_9V_V (V) @D9H0 V2T_093F1D9020170530161130Battery_9V_V (V) @:9x U1T_075DC9B020170530161158SO8 (TLV3491) TLV3491TLV3491TLV3491TLV3491Label+!PPd*3  @d*4X+ @d*5!  @d*2  @d*1! ( @h 00g+Arial m۶m?g-Arialm۶m?g+Arialm۶m?R}@R}@* END MODEL TLV3401 * TLV3491N*****************************************************************************v* (C) Copyright 2011 Texas Instruments Incorporated. All rights reserved. N*****************************************************************************H** This model is designed as an aid for customers of Texas Instruments.K** TI and its licensors and suppliers make no warranties, either expressedH** or implied, with respect to this model, including the warranties of F** merchantability or fitness for a particular purpose. The model isK** provided solely on an "as is" basis. The entire risk as to its quality)** and performance is with the customer.N******************************************************************************D* This model is subject to change without notice. Texas Instruments;* Incorporated is not responsible for updating this model.*N******************************************************************************B** Released by: Analog eLab Design Center, Texas Instruments Inc.* Part: TLV3491* Date: 13JUN2011* Model Type: ALL IN ONE* Simulator: TINA%* Simulator Version: 9.1.30.94 SF-TI* EVM Order Number: N/A* EVM Users Guide: N/A;* Datasheet: SBOS262D DECEMBER 2002 REVISED APRIL 2005** Model Version: 1.0*N****************************************************************************** * Updates:** Version 1.0 : * Release to Web*N******************************************************************************9* THIS MODEL IS APPLICABLE FOR TLV3491,TLV3492 & TLV3494** BEGIN NOTES* FOR ACCURATE INPUT BIAS* CURRENTS, USE GMIN=1E-13* MODEL TEMPERATURE RANGE IS* -40 C TO +125 C, NOT ALL* PARAMETERS TRACK THOSE OF* THE REAL PART VS TEMPERATURE * END NOTES* BEGIN FEATURES* OFFSET CHANGE AT TRANSITION* WHEN CMV NEAR POSITIVE RAIL* INPUT BIAS CURRENT* INPUT CAPACITANCE"* INPUT COMMON MODE VOLTAGE RANGE* INPUT CLAMPS TO RAILS* CMRR WITH FREQUENCY EFFECTS* PSRR WITH FREQUENCY EFFECTS* OUTPUT TRANSISTION TIME* QUIESCENT CURRENT* QUIESCENT CURRENT VS VOLTAGE#* QUIESCENT CURRENT VS TEMPERATURE* RAIL TO RAIL OUTPUT STAGE* HIGH CLOAD EFFECTS"* OUTPUT CURRENT THROUGH SUPPLIES* OUTPUT CURRENT LIMITING* OUTPUT CLAMPS TO RAILS!* OUTPUT SWING VS OUTPUT CURRENT* END FEATURES* BEGIN MODEL TLV3491 * PINOUT IS FOR SOT23-5 PACKAGE!* PINOUT ORDER +IN -IN +V -V OUT * PINOUT 3 4 5 2 1N*****************************************************************************.SUBCKT TLV3491 3 4 5 2 1 R81 6 5 0.5 R82 2 7 0.5R84 8 9 2.47E3R85 10 11 0.5R86 12 13 0.5 D21 1 5 DD D22 2 1 DDE25 12 0 2 0 1E26 11 0 5 0 1R96 20 17 100R97 21 15 100C32 9 1 8E-15C36 1 0 0.1E-12I28 18 19 0.5E-6 R5 1 16 17 R6 14 1 27G16 22 23 8 23 -1E-3G17 23 24 8 23 1E-3G18 23 25 19 12 1E-3G19 26 23 11 18 1E-3 D31 26 22 DD D32 24 25 DD M24 14 15 7 7 NOUT L=3U W=6000U M25 16 17 6 6 POUT L=3U W=6000U"M26 18 18 10 10 POUT L=3U W=6000U"M29 19 19 13 13 NOUT L=3U W=6000UR10 22 26 100E6R11 25 24 100E6R12 26 11 1E3R13 12 25 1E3E39 11 20 11 26 1E40 21 12 25 12 1R14 24 23 1E6R15 25 23 1E6R16 23 26 1E6R17 23 22 1E6R18 2 5 200E6G20 5 2 27 0 -0.6E-6 D33 28 0 DDV33 28 27 0.6 R19 0 27 1E6I31 5 2 0.73E-6I34 0 28 0.2E-6E44 23 12 11 12 0.5R20 29 30 1.2E6 D34 31 29 DD D35 29 32 DDV45 32 33 0.3V46 34 31 0.3C42 8 23 0.02E-12R21 29 8 1.1E6E45 34 23 35 0 1E46 33 23 35 0 -1 D36 36 0 DDI35 0 36 1.5E-6V47 36 35 0.487 R22 0 35 1E9 D37 37 38 DD D38 39 37 DDG21 37 23 40 41 -0.2E-3R23 23 37 3.5E6C43 37 23 9E-12 M30 30 37 38 38 POUT L=3U W=30U M31 30 37 39 39 NOUT L=3U W=30UG22 37 23 42 43 -0.2E-3 R24 44 45 2 R25 46 45 2E47 47 0 11 0 1E48 48 0 12 0 1E49 49 0 50 0 1R26 47 51 1E6R27 48 52 1E6R28 49 53 1E6 R29 0 51 100 R30 0 52 100 R31 0 53 100E50 54 3 53 0 -0.95R32 55 50 1E3R33 50 56 1E3C44 47 51 5E-12C45 48 52 5E-12C46 49 53 2E-12E51 57 54 52 0 0.25E52 58 57 51 0 0.25M32 41 59 44 44 PIN L=3U W=20UM33 40 4 46 46 PIN L=3U W=20UR34 12 41 25E3R35 12 40 25E3C47 41 40 8E-12C48 58 0 2E-12C49 4 0 2E-12 V48 58 59 0M34 43 60 61 61 NIN L=3U W=20U R36 62 61 2M35 42 4 63 63 NIN L=3U W=20U R37 62 63 2R38 43 11 25E3R39 42 11 25E3C50 43 42 8E-12V49 59 60 1E-3!M36 64 65 66 66 POUT L=6U W=500U M37 67 68 11 11 PIN L=6U W=500UV50 11 65 1.25 M38 62 64 12 12 NIN L=6U W=500U M39 64 64 12 12 NIN L=6U W=500UE53 56 0 58 0 1E54 55 0 4 0 1 M40 68 68 11 11 PIN L=6U W=500UI36 68 12 1E-6 V51 67 45 0J6 69 58 69 JCJ7 69 4 69 JC J8 4 70 4 JCJ9 58 70 58 JCC51 58 4 4E-12I37 58 0 1E-12I38 4 0 1E-12R140 66 67 1E3V53 11 69 0.1V54 70 12 0.1V55 38 23 2.5V56 39 23 -2.5 .MODEL DD D.MODEL JC NJF IS=1E-18!.MODEL PIN PMOS KP=200U VTO=-0.7 .MODEL NIN NMOS KP=200U VTO=0.7..MODEL POUT PMOS KP=200U VTO=-0.7 LAMBDA=0.01-.MODEL NOUT NMOS KP=200U VTO=0.7 LAMBDA=0.01.ENDS\SPICELIB\Comparators.LIB3452134521D9  V3T_075DECF020170530161313Battery_9V_V (V)? 90R12T_077579D020170530161616R_AX600_W200 (R)@@?Y@9p0VoutT_07757FB020170530161651 NOPCB (VF)9pVampT_0775859020170530162350 NOPCB (VF):9_@U1T_047BC76020200619200536 LPV821LPV821RC:\Users\x1057702\AppData\Local\Temp\DesignSoft\{Tina9-TI-12232019-141817}\LPV821SCK#LPV821Label#PP(d*VCCzD  @d*VEE A  @d*OUT  @d*IN+p4Gp4G<  @d*IN-8 @h 00g"- Courier New?g"+ Courier New ?g"+ Courier New?L.{@L.{@*$ * LPV821N*****************************************************************************v* (C) Copyright 2020 Texas Instruments Incorporated. All rights reserved. N*****************************************************************************H** This model is designed as an aid for customers of Texas Instruments.K** TI and its licensors and suppliers make no warranties, either expressedH** or implied, with respect to this model, including the warranties of F** merchantability or fitness for a particular purpose. The model isK** provided solely on an "as is" basis. The entire risk as to its quality)** and performance is with the customer.N******************************************************************************D* This model is subject to change without notice. Texas Instruments;* Incorporated is not responsible for updating this model.*N******************************************************************************<** Released by: Online Design Tools, Texas Instruments Inc.* Part: LPV821* Date: 19/06/2020* Model Type: All In One* Simulator: TINA-TI'* Simulator Version: 9.3.200.277 SF-TI* EVM Order Number: N/A * EVM Users Guide: N/A9* Datasheet: SNOSD36A -AUGUST 2017 REVISED DECEMBER 2017B* Created with Green-Williams-Lis Op Amp Macro-model Architecture** Model Version: Final 1.1*N****************************************************************************** * Final 1.1$* Updated the following parameters:* 1. Input bias current * 2. Input offset current * 3. Quisient current* 4. Vos drift * 5. Current Noise * 6. Voltage Noise * 7. CLAW curve * 8. Short Circuit Currrent* 9. Ccm and Cdiff* 10. Slew Rate * 11. DC gain edits in CMRR.* * Final 1.0* Release to Web.*N****************************************************************************** Model Usage Notes:,* 1. The following parameters are modeled: F* OPEN-LOOP GAIN AND PHASE VS. FREQUENCY WITH RL, CL EFFECTS (Aol)* UNITY GAIN BANDWIDTH (GBW);* INPUT COMMON-MODE REJECTION RATIO VS. FREQUENCY (CMRR)6* POWER SUPPLY REJECTION RATIO VS. FREQUENCY (PSRR)'* DIFFERENTIAL INPUT IMPEDANCE (Zid)&* COMMON-MODE INPUT IMPEDANCE (Zic)2* OPEN-LOOP OUTPUT IMPEDANCE VS. FREQUENCY (Zo)-* OUTPUT CURRENT THROUGH THE SUPPLY (Iout)3* INPUT VOLTAGE NOISE DENSITY VS. FREQUENCY (en)3* INPUT CURRENT NOISE DENSITY VS. FREQUENCY (in)1* OUTPUT VOLTAGE SWING vs. OUTPUT CURRENT (Vo)'* SHORT-CIRCUIT OUTPUT CURRENT (Isc)* QUIESCENT CURRENT (Iq)+* SETTLING TIME VS. CAPACITIVE LOAD (ts)* SLEW RATE (SR)/* SMALL SIGNAL OVERSHOOT VS. CAPACITIVE LOAD* LARGE SIGNAL RESPONSE!* OVERLOAD RECOVERY TIME (tor)* INPUT BIAS CURRENT (Ib)* INPUT OFFSET CURRENT (Ios)* INPUT OFFSET VOLTAGE (Vos)5* INPUT OFFSET VOLTAGE VS. TEMPERATURE (VOS DRIFT)** INPUT COMMON-MODE VOLTAGE RANGE (Vcm)E* INPUT OFFSET VOLTAGE VS. INPUT COMMON-MODE VOLTAGE (Vos vs. Vcm)+* INPUT/OUTPUT ESD CELLS (ESDin, ESDout)N*****************************************************************************#.SUBCKT LPV821 IN+ IN- VCC VEE OUTN*****************************************************************************-.MODEL R_NOISELESS RES (TCE=0 T_ABS=-273.15)<.MODEL S_VSWITCH_1 VSWITCH (RON=10M ROFF=1T VON=10M VOFF=0)?.MODEL S_VSWITCH_2 VSWITCH (RON=1M ROFF=1T VON=900M VOFF=800M)<.MODEL S_VSWITCH_3 VSWITCH (RON=50 ROFF=1T VON=250M VOFF=0)N*****************************************************************************I_OS ESDn MID -7e-12I_B 30 MID 7e-12V_GRp 45 MID 2686V_GRn 46 MID -8350V_ISCp 39 MID 21V_ISCn 40 MID -50 V_ORn 38 VCLP -0.00042287V11 44 37 0V_ORp 36 VCLP 0.015533V12 43 35 0V4 27 OUT 0VCM_MIN 67 VEE_B -0.05VCM_MAX 68 VCC_B 0.05I_Q VCC VEE 6.5e-07XU6 75 30 VOS_DRIFT $XU5 ESDp ESDn VCC VEE ESD_0$XU4 19 ESDp MID PSRR_CMRR_0%XU3 20 VEE_B MID PSRR_CMRR_1%XU2 21 VCC_B MID PSRR_CMRR_2IXU1 23 22 CLAMP VSENSE CLAW_CLAMP CL_CLAMP 24 26 27 MID AOL_ZO_0C28 31 MID 1P #R77 32 31 R_NOISELESS 100 C27 33 MID 1P #R76 34 33 R_NOISELESS 100 "R75 MID 35 R_NOISELESS 1 GVCCS8 35 MID 36 MID -1"R74 37 MID R_NOISELESS 1 GVCCS7 37 MID 38 MID -1Xi_nn ESDn MID FEMT_0Xi_np MID 30 FEMT_0Xe_n ESDp 30 VNSE_0.XIQPos VIMON MID MID VCC VCCS_LIMIT_IQ_0.XIQNeg MID VIMON VEE MID VCCS_LIMIT_IQ_0 C_DIFF ESDp ESDn 3.3e-12 1XCL_AMP 39 40 VIMON MID 41 42 CLAMP_AMP_LO_0+SOR_SWp CLAMP 43 CLAMP 43 S_VSWITCH_1+SOR_SWn 44 CLAMP 44 CLAMP S_VSWITCH_1.XGR_AMP 45 46 47 MID 48 49 CLAMP_AMP_HI_0#R39 45 MID R_NOISELESS 1T #R37 46 MID R_NOISELESS 1T &R42 VSENSE 47 R_NOISELESS 1M C19 47 MID 1F "R38 48 MID R_NOISELESS 1 "R36 MID 49 R_NOISELESS 1 "R40 48 50 R_NOISELESS 1M "R41 49 51 R_NOISELESS 1M C17 50 MID 1F C18 MID 51 1F *XGR_SRC 50 51 CLAMP MID VCCS_LIM_GR_0"R21 41 MID R_NOISELESS 1 "R20 MID 42 R_NOISELESS 1 "R29 41 52 R_NOISELESS 1M "R30 42 53 R_NOISELESS 1M C9 52 MID 1F C8 MID 53 1F ,XCL_SRC 52 53 CL_CLAMP MID VCCS_LIM_4_0#R22 39 MID R_NOISELESS 1T #R19 MID 40 R_NOISELESS 1T 0XCLAWp VIMON MID 54 VCC_B VCCS_LIM_CLAW+_00XCLAWn MID VIMON VEE_B 55 VCCS_LIM_CLAW-_0%R12 54 VCC_B R_NOISELESS 1K "R16 54 56 R_NOISELESS 1M %R13 VEE_B 55 R_NOISELESS 1K "R17 57 55 R_NOISELESS 1M C6 57 MID 1F C5 MID 56 1F $G2 VCC_CLP MID 56 MID -1M(R15 VCC_CLP MID R_NOISELESS 1K $G3 VEE_CLP MID 57 MID -1M(R14 MID VEE_CLP R_NOISELESS 1K V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}OGVO- COM VO- VALUE = {IF(V(VIN,COM)V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}OGVO- COM VO- VALUE = {IF(V(VIN,COM)10E-3 | V(OLP,COM)>10E-3),1,0)}.ENDS*6.SUBCKT VCCS_EXT_LIM_0 VIN+ VIN- IOUT- IOUT+ VP+ VP-.PARAM GAIN = 1IG1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VIN+,VIN-),V(VP-,VIN-), V(VP+,VIN-))}.ENDS*IN+IN-VCCVEEOUT9l  VssT_075D833020170530161130 NOPCB (J)9lH0 VssT_075DC3D020170530161130 NOPCB (J)9d8T_075D7D5020170530161130 NOPCB (GND)9d T_075D777020170530161130 NOPCB (GND)9dHXT_075D719020170530161130 NOPCB (GND)9dT_075D891020170530161130 NOPCB (GND)9dHT_075DF2D020170530161319 NOPCB (GND)9dx T_075DF8B020170530161347 NOPCB (GND)-?|"`KMbP??+dd?Y@ILoad[dddd$@?.A.A.AeAMbP?@@??ư> $ 4@D@ =B?& .>??ư>ư>ư>ư>ư>ư>?I@?I@?I@& .> ;@& .>-q=ư>MbP?-q=MbP?vIh%<=@@D@& .>?MbP?4@?{Gz?ꌠ9Y>)F@?+= _BKH9$@Y@& .>ư>?.AMbP???Xd I@nMbP?{Gz?{Gz?MbP????|=Hz>}Ô%IT