7.3.1 Device Power Up

The bq24780S gets power from adapter or battery. After VCC is above its UVLO threshold, the device wakes up and starts communication.

7.3.2 System Power Selection

The bq24780S device automatically switches adapter or battery power to system. An automatic break-before-make logic prevents shoot-through currents when the selectors switch.

The ACDRV drives a pair of common-source (CMSRC) N-channel power MOSFETs (ACFET and RBFET) between adapter and ACP. The ACFET separates adapter from system and battery, and provides a limited di/dt when plugging in adapter by controlling the ACFET turn-on time. Meanwhile, it protects the adapter when the system or battery is shorted. The RBFET provides negative input voltage protection and battery discharge protection when adapter is shorted to ground, and minimizes system power dissipation with its low R_DS(on) compared to a Schottky diode.

When the adapter is not present, ACDRV is pulled to CMSRC to keep ACFET and RBFET off, disconnecting the adapter from the system. BATDRV stays at V_BATSRC + 6 V to connect battery to system if all of the following conditions are valid:

• V_CC > V_UVLO
• V_ACN < V_SRN + 200 mV
• ACFET/RBFET off

After the adapter plugs in, the system power source switches from battery to adapter if all of the following conditions are valid:

• ACOK high
• Not in LEARN mode
• In LEARN mode and V_SRN < battery depletion threshold

The gate drive voltage on ACFET and RBFET is V_CMSRC + 6 V. If the ACFET/RBFET have been turned on for 20 ms, and the voltage across gate and source is still less than 5.7 V, ACFET and RBFET are turned off. After 1.3s delay, it resumes turning on ACFET and RBFET. If such a failure is detected seven times within 90 seconds, ACFET/RBFET are latched off and an adapter removal and system shut down is required to force ACDET < 0.6 V to reset the IC. After IC reset from latch off, ACFET/RBFET can be turned on again. After 90 seconds, the failure counter is reset to zero to prevent latch off.

To turn off ACFET/RBFET, one of the following conditions must be valid:

• In LEARN mode and V_SRN is above battery depletion threshold;
• ACOK low

To limit the adapter inrush current during ACFET turn-on, the Cgs and Cgd external capacitor of ACFET must be carefully selected following the guidelines below:

• Minimize total capacitance on system
• Cgs should be 40× or higher than Cgd to avoid ACFET false turn on during adapter hot plug-in
• Fully turn on ACFET within 20 ms, otherwise, charger IC will consider turn-on failure
• Check with MOSFET vendor on peak current rating
• Place 4-kΩ resistor in series with ACDRV, CMSRC, and BATDRV pin to limit inrush current.

7.3.3 Enable and Disable Charging

In charge mode, the following conditions have to be valid to start charge:

• Charge is enabled through SMBus (REG0x12[0], default is 0, charge enabled)
• ILIM pin voltage is higher than 120 mV
• All ChargeCurrent(), ChargeVoltage() and InputCurrent() registers have valid value programmed
• ACOK is valid (see Device Power Up for details)
• ACFET and RBFET turn on and gate voltage is high enough (see System Power Selection for details)
• V_SRN does not exceed BATOVP threshold
• IC temperature does not exceed TSHUT threshold
• Not in ACOC condition (see Device Protections Features for details)

One of the following conditions stops on-going charging:

• Charge is inhibited through SMBus(REG0x12[0]=1)
• ILIM pin voltage is lower than 60 mV
• One of three registers is set to 0 or out of range
• ACOK is pulled low (see Device Power Up for details)
• ACFET turns off
• V_SRN exceeds BATOVP threshold
• TSHUT IC temperature threshold is reached
• ACOC is detected (see Device Protections Features for details)
• Short circuit is detected (see Inductor Short, MOSFET Short Protection for details)
• Watchdog timer expires if watchdog timer is enabled (see Charger Timeout for details)

7.3.4 Current and Power Monitor

7.3.5 Processor Hot Indication for CPU Throttling

When CPU is running turbo mode, the peak power may exceed total available power from adapter and battery. The adapter current and battery discharge overshoot, or system voltage drop indicates the system power may be too high. When the adapter or battery is removed, the remaining power source may not support the peak power in turbo mode. The processor hot function in bq24780S monitors these events, and PROCHOT pulse is asserted.

The PROCHOT triggering events include:

• ICRIT: adapter peak current
• INOM: adapter average current (110% of input current limit)
• IDCHG: battery discharge current
• VSYS: system voltage on SRN for 2s - 4s battery
• ACOK: upon adapter removal (ACOK pin HIGH to LOW)
• BATPRES: upon battery removal (BATPRES pin LOW to HIGH)
• CMPOUT: Independent comparator output (CMPOUT pin HIGH to LOW)

The threshold of ICRIT, IDCHG or VSYS, and the deglitch time of ICRIT, INOM, IDCHG or CMPOUT are programmable through SMBus. Each triggering event can be individually enabled in REG0x3D[6:0].

Figure 6. PROCHOT Profile

When any event in PROCHOT profile is triggered, PROCHOT is asserted low for minimum 10 ms (default REG0x3C[4:3]=10). At the end of the 10 ms, if the PROCHOT event is still active, the pulse gets extended.

During one cycle of PROCHOT, all the triggering events are saved in status register REG0x3A[6:0] for easy test debug and system optimization.

7.3.6 Converter Operation

The synchronous buck PWM converter uses a fixed frequency voltage control scheme and internal type III compensation network. The LC output filter gives a characteristic resonant frequency:

Equation 2.

The resonant frequency, f_o, is used to determine the compensation to ensure there is sufficient phase margin for the target bandwidth. The LC output filter should be selected to give a resonant frequency of 10- to 20-kHz nominal for the best performance. Suggested component value for a charge current of 800-kHz default switching frequency is shown in Table 1:

Ceramic capacitors show a DC-bias effect. This effect reduces the effective capacitance when a DC-bias voltage is applied across a ceramic capacitor, as on the output capacitor of a charger. The effect may lead to a significant capacitance drop, especially for high output voltages and small capacitor packages. See the manufacturer's data sheet about the performance with a DC bias voltage applied. It may be necessary to choose a higher voltage rating or nominal capacitance value to get the required value at the operating point.

7.3.7 Battery LEARN Cycle

A battery LEARN cycle can be activated through the REG0x12[5]. When LEARN is enabled, the system receives power from the battery instead of the adapter turning off ACFET/RBFET and turning on BATFET. The LEARN function allows the battery to discharge in order to calibrate the battery gas gauge over a complete discharge and charge cycle. The controller automatically exits the LEARN cycle when the battery voltage is below the battery depletion threshold. The system switches back to adapter input by turning off BATFET and turning on ACFET/RBFET. After the LEARN cycle, REG0x12[5] is automatically reset to 0.

When the battery is removed during LEARN mode, BATPRES rises from low to high and the device exits LEARN mode. ACFET/RBFET quickly turns on in 100µs to prevent the system from crashing. The turn-on triggered by BATPRES is faster than that triggered by battery depletion comparator.

7.3.8 Charger Timeout

The bq24780S device includes a watchdog timer to terminate charging or hybrid power boost mode if the charger does not receive a write ChargeVoltage() or write ChargeCurrent() command within 175 s (adjustable through 0x12[14:13] command).

If a watchdog timeout occurs, all register values keep unchanged, but converter is suspended. A write to ChargeVoltage(), or ChargeCurrent(), or change REG0x12[14:13] resets watchdog timer and resumes converter for charging or hybrid power boost mode. The watchdog timer can be disabled, or set to 5, 88, or 175 s through SMBus command REG0x12[14:13]).

7.3.9 Device Protections Features

7.4.1 Battery Charging

The bq24780S charges 1-4 cell battery in constant current (CC), and constant voltage (CV) mode. The host programs battery voltage in REG0x15(). According to battery voltage, the host programs appropriate charge current in REG0x14(). When battery is full or battery is not in good condition to charge, host terminates charge by setting REG0x12[0] to 1, or setting either ChargeVoltage() or ChargeCurrent() to zero.

See the Feature Description section for details on charge enable conditions and register programming.

7.4.2 Hybrid Power Boost Mode

The bq24780S device supports the hybrid power boost mode by allowing battery discharge energy to system when system power demand is temporarily higher than adapter maximum power level so the adapter does not crash. After device powers up, the REG0x37[2] is 0 to disable hybrid power boost mode. To enable hybrid power boost mode, host writes 1 to REG0x37[2]. The TB_STAT pin and REG0x37[1] indicate if the device is in hybrid power boost mode.

To support hybrid power boost mode, input current must be set higher than 1536 mA for 10 mΩ input current sensing resistor. When input current is higher than 107% of input current limit in REG0x3F(), charger IC allows battery discharge and charger converter changes from buck converter to boost converter. During hybrid power boost mode the adapter current is regulated at input current limit level so that adapter will not crash. The battery discharge current depends on system current requirement and adapter current limit. The watchdog timer can be enabled to prevent converter running at hybrid power boost mode for too long.

7.5.1 SMBus Interface

The bq24780S device operates as a slave, receiving control inputs from the embedded controller host through the SMBus interface. The bq24780S device uses a simplified subset of the commands documented in System Management Bus Specification V1.1, which can be downloaded from www.smbus.org. The bq24780S device uses the SMBus read-word and write-word protocols (shown in Table 2 and Table 3) to communicate with the smart battery. The bq24780S device performs only as a SMBus slave device with address 0b00010010 (0x12H) and does not initiate communication on the bus. In addition, the device has two identification registers, a 16-bit device ID register (0xFFH) and a 16-bit manufacturer ID register (0xFEH).

SMBus communication starts when VCC is above UVLO.

The data (SDA) and clock (SCL) pins have Schmitt-trigger inputs that can accommodate slow edges. Choose pullup resistors (10 kΩ) for SDA and SCL to achieve rise times according to the SMBus specifications. Communication starts when the master signals a start condition, which is a high-to-low transition on SDA, while SCL is high. When the master has finished communicating, the master issues a stop condition, which is a low-to-high transition on SDA, while SCL is high. The bus is then free for another transmission. Figure 7 and Figure 8 show the timing diagram for signals on the SMBus interface. The address byte, command byte, and data bytes are transmitted between the start and stop conditions. The SDA state changes only while SCL is low, except for the start and stop conditions. Data is transmitted in 8-bit bytes and is sampled on the rising edge of SCL. Nine clock cycles are required to transfer each byte in or out of the bq24780S device because either the master or the slave acknowledges the receipt of the correct byte during the ninth clock cycle. The bq24780S supports the charger commands listed in Table 2.

7.5.1.2 Timing Diagrams

A = Start condition	H = LSB of data clocked into slave
B = MSB of address clocked into slave	I = Slave pulls SMBDATA line low
C = LSB of address clocked into slave	J = Acknowledge clocked into master
D = R/W bit clocked into slave	K = Acknowledge clock pulse
E = Slave pulls SMBDATA line low	L = Stop condition, data executed by slave
F = ACKNOWLEDGE bit clocked into master	M = New start condition
G = MSB of data clocked into slave

Figure 7. SMBus Write Timing

A = Start condition	G = MSB of data clocked into master
B = MSB of address clocked into slave	H = LSB of data clocked into master
C = LSB of address clocked into slave	I = Acknowledge clock pulse
D = R/W bit clocked into slave	J = Stop condition
E = Slave pulls SMBDATA line low	K = New start condition
F = ACKNOWLEDGE bit clocked into master

Figure 8. SMBus Read Timing

7.6.1 Battery-Charger Commands

The bq24780S supports thirteen battery-charger commands that use either Write-Word or Read-Word protocols, as summarized in Table 4. ManufacturerID() and DeviceID() can be used to identify the bq24780S. The ManufacturerID() command always returns 0x0040H and the DeviceID() command always returns 0x0030H.

7.6.2 Setting Charger Options

7.6.3 ChargeOption1 Register

7.6.4 ChargeOption2 Register

7.6.5 ChargeOption3 Register

7.6.6 ProchotOption0 Register

7.6.7 ProchotOption1 Register

7.6.8 ProchotStatus Register

7.6.9 Setting the Charge Current

To set the charge current, write a 16-bit ChargeCurrent() command (0x14H or 0b00010100) using the data format listed in Table 12. With 10-mΩ sense resistor, the bq24780S device provides a charge current range of 128 mA to 8.128 A, with 64-mA step resolution. Upon POR, charge current is 0 A. Any conditions for ACOK low except ACOV resets the ChargeCurrent() to 0. Sending ChargeCurrent() 0 mA terminates charge.

To provide secondary protection, the bq24780S has an ILIM pin with which the user can program the maximum allowed charge current. Internal charge current limit is the lower one between the voltage set by ChargeCurrent(), and the voltage on ILIM pin. To disable this function, the user can pull ILIM above 2 V, which is the maximum charge current regulation limit. When ILIM is below 60 mV, battery charging is disabled. The preferred charge current limit can be derived from below equation:

Equation 3.

The SRP and SRN pins are used to sense R_SR with default value of 10 mΩ. However, resistors of other values can also be used. For a larger sense resistor, a larger sense voltage is given, and a higher regulation accuracy; but, at the expense of higher conduction loss. If current sensing resistor value is too high, it may trigger an overcurrent protection threshold because the current ripple voltage is too high. In such a case, either a higher inductance value or a lower current sensing resistor value should be used to limit the current ripple voltage level. A current sensing resistor value no more than 20 mΩ is suggested.

7.6.10 Setting the Charge Voltage

To set the output charge regulation voltage, write a 16-bit ChargeVoltage() command (0x15H or 0b00010101) using the data format listed in Table 13. The bq24780S device provides charge voltage range from 1.024 to 19.200 V, with 16-mV step resolution. Upon POR, charge voltage limit is 0 V. Sending ChargeVoltage() 0 mV terminates charge.

The SRN pin is used to sense the battery voltage for voltage regulation and should be connected as close to the battery as possible, and directly place a decoupling capacitor (0.1 µF recommended) as close to IC as possible to decouple high frequency noise.

7.6.11 Setting Input Current

System current normally fluctuates as portions of the system are powered-up or put to sleep. With the input current limit, the output current requirement of the AC wall adapter can be regulated its rating, reducing system cost.

The total input current, from a wall cube or other DC source, is the sum of the system supply current and the current required by the charger. When the input current exceeds the set input current limit, the bq24780S device decreases the charge current to provide priority to system load. As the system current rises, the available charge current drops linearly to 0. Thereafter, charger goes into hybrid power boost mode and adds battery power to support system load. During turbo-boost mode, input current stays in regulation.

During DPM regulation, the total input current is the sum of the device supply current I_BIAS, the charger input current, and the system load current I_LOAD, and can be estimated as follows:

Equation 4.

In the above equation, η is the efficiency the switching regulator and I_BATTERY is the battery charging or discharging current (positive for charging and negative for discharging). In charging mode, the charger converter is in buck configuration. In turbo-boost mode, the charger converter is in boost configuration.

To set the input current limit, write a 16-bit InputCurrent() command (0x3FH or 0b00111111) using the data format listed in Table 14. When using a 10-mΩ sense resistor, the bq24780S device provides an input-current limit range of 128 mA to 8.064 A, with 128-mA resolution. Upon POR, default input current limit is 4096 mA on 10-mΩ current sensing resistor (R_AC).

The ACP and ACN pins are used to sense R_AC with default value of 10 mΩ. However, resistors of other values can also be used. For a larger sense resistor, larger sense voltage is given, and higher regulation accuracy, but at the expense of higher conduction loss.

7.6.12 Setting the Discharge Current

To set the discharging current limit, write a 16-bit DischargeCurrent() command (0x39H or 0b00111111) using the data format listed in Table 15. When using a 10-mΩ sense resistor, the bq24780S device provides a discharge current limit range of 512 mA to 32.256 A, with 512-mA resolution. Upon POR, default discharge current limit is 6.144 A on 10-mΩ current sensing resistor (R_SR).

To provide secondary protection during battery discharge, the bq24780S has an ILIM pin with which the user can program the maximum discharge current. Typically, the user sets the limit below battery pack over current protection (OCP) threshold for maximum battery discharge capacity. Refer to battery specification for OCP information. Internal discharge current limit is the lower one between the voltage set by DischargeCurrent(), and the voltage on ILIM pin. To disable this function, the user can pull ILIM pin above 1.6V, which is the maximum discharge current regulation limit. When ILIM is below 60mV, battery discharge is disabled. The preferred discharge current limit can be derived from Equation 5.

Equation 5.