ZHCSR80A June 2009 – January 2023 AMC6821-Q1
PRODUCTION DATA
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Revision History
- 5 說明（續(xù)）
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Functional Block Diagram
- 8.2 Feature Description
- 8.3 Device Functional Modes
- 8.4 Programming
- 8.5 Register Map
- 9 Application and Implementation
- 10Device and Documentation Support
- 11Mechanical, Packaging, and Orderable Information
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
- DBQ|16
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
7.6 Timing Requirements
At VDD = 3 V or +5 V, and TA = –40°C to +125°C, unless otherwise noted.
| PARAMETER | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|
| fSCLK | Clock frequency | 100 | kHz | ||
| tBUF | Bus free time | 4.7 | μs | ||
| tSU:STA | Start setup time | 4.7 | μs | ||
| tHD:STA | Start hold time | 4 | μs | ||
| tSU:STO | Stop condition setup time | 4 | μs | ||
| tLOW | SCLK low time | 4.7 | μs | ||
| tHIGH | SCLK high time | 4 | μs | ||
| tR | SCLK, SDA rise time | 1000 | ns | ||
| tF | SCLK, SDA fall time | 300 | ns | ||
| tSU:DAT | Data setup time | 350 | ns | ||
| tHD:DAT | Data hold time | 350 | ns | ||
| tPOR | Time from software reset command or power-on to normal operation. During this period, I2C? communication is not recognized. | 1.5 | ms | ||
Figure 7-1 Timing Specification