9.3.1 Adapter Detect and ACOK Output

The bq24735 uses an ACOK comparator to determine the source of power on VCC pin, either from the battery or adapter. An external resistor voltage divider attenuates the adapter voltage before it goes to ACDET. The adapter detect threshold should typically be programmed to a value greater than the maximum battery voltage, but lower than the maximum allowed adapter voltage.

The open-drain ACOK output requires external pullup resistor to system digital rail for a high level. It can be pulled to external rail under the following conditions:

• V_VCC > UVLO
• 2.4 V < V_ACDET < 3.15 V (not in ACOVP condition, nor in low input voltage condition)
• V_VCC – V_SRN > 275 mV (not in sleep mode)

The first time after IC POR always gives 150-ms ACOK rising edge delay no matter what the ChargeOption register value is. Only after the ACDET pin voltage is pulled below 2.4 V (but not below 0.6 V, which resets the IC and forces the next ACOK rising edge deglitch time to be 1.3 s) and the ACFET has been turned off at least one time, the 1.3 s (or 150 ms) delay time is effective for the next time the ACDET pin voltage goes above 2.4 V. To change this option, the VCC pin voltage must above UVLO, and the ACDET pin voltage must be above 0.6 V which enables the IC SMBus communication and sets ChargeOption() bit [15] to 0 which sets the next ACOK rising deglitch time to be 150 ms. The purpose of the default 1.3 s rising edge deglitch time is to turn off the ACFET long enough when the ACDET pin is pulled below 2.4 V by excessive system current, such as overcurrent or short circuit.

9.3.2 Adapter Overvoltage (ACOVP)

When the ACDET pin voltage is higher than 3.15 V, it is considered as adapter overvoltage. ACOK will be pulled low, and charge will be disabled. ACFET will be turned off to disconnect the high voltage adapter to system during ACOVP. BATFET will be turned on if turnon conditions are valid. See System Power Selection for details.

When ACDET pin voltage falls below 3.15 V and above 2.4 V, it is considered as adapter voltage returns back to normal voltage. ACOK will be pulled high by external pullup resistor. BATFET will be turned off and ACFET and RBFET will be turned on to power the system from adapter. The charge can be resumed if enable charge conditions are valid. See Enable and Disable Charging for details.

9.3.3 System Power Selection

The bq24735 automatically switches adapter or battery power to system. The battery is connected to system at POR if battery exists. The battery is disconnected from system and the adapter is connected to system after default 150 ms delay (first time, the next time default is 1.3 s and can be changed to 150 ms) if ACOK goes HIGH. An automatic break-before-make logic prevents shoot-through currents when the selectors switch.

The ACDRV drives a pair of common-source (CMSRC) N-channel power MOSFETs (ACFET and RBFET) between adapter and ACP (see Figure 16 for details). The ACFET separates adapter from battery or system, and provides a limited DI/DT when plugging in adapter by controlling the ACFET turnon time. Meanwhile it protects adapter when system or battery is shorted. The RBFET provides negative input voltage protection and battery discharge protection when adapter is shorted to ground, and minimizes system power dissipation with its low R_DS(on) compared to a Schottky diode.

When the adapter is not present, ACDRV is pulled to CMSRC to keep ACFET and RBFET off, disconnecting adapter from system. BATDRV stays at V_SRN + 6 V to connect battery to system if all the following conditions are valid:

• V_VCC > UVLO
• V_SRN > UVLO
• V_ACN < 200 mV above V_SRN (ACN_SRN comparator)

Approximately 150 ms (first time; the next time default is 1.3 s and can be changed to 150 ms) after the adapter is detected (ACDET pin voltage from 2.4 V to 3.15 V), the system power source begins to switch from battery to adapter if all the following conditions are valid:

• Not in LEARN mode or in LEARN mode and V_SRN is lower than battery depletion threshold
• ACOK high

The gate drive voltage on ACFET and RBFET is V_CMSRC + 6 V. If the ACFET/RBFET have been turned on for 20 ms, and the voltage across gate and source is still less than 5.9 V, ACFET and RBFET will be turned off. After 1.3-s delay, it resumes turning on ACFET and RBFET. If such a failure is detected seven times within 90 seconds, ACFET/RBFET will be latched off and an adapter removal and system shut down is required to force ACDET < 0.6 V to reset the IC. After IC reset from latch off, ACFET/RBFET can be turned on again. After 90 seconds, the failure counter will be reset to zero to prevent latch off. With ACFET/RBFET off, charge is disabled.

To turn off ACFET/RBFET, one of the following conditions must be valid:

• In LEARN mode and V_SRN is above battery depletion threshold
• ACOK low

To limit the inrush current on ACDRV pin, CMSRC pin and BATDRV pin, a 4-kΩ resistor is recommended on each of the three pins.

To limit the adapter inrush current when ACFET is turned on to power system from adapter, the Cgs and Cgd external capacitor of ACFET must be carefully selected. The larger the Cgs and Cgd capacitance, the slower turnon of ACFET will be and less inrush current of adapter. However, if Cgs or Cgd is too large, the ACDRV-CMSRC voltage may still go low after the 20-ms turnon time window is expired. To make sure ACFET will not be turned on when adapter is hot plugged in, the Cgs value should be 20 times or higher than Cgd. The most cost effective way to reduce adapter inrush current is to minimize system total capacitance.

9.3.4 Automatic Internal Soft-Start Charger Current

Every time the charge is enabled, the charger automatically applies soft start on charge current to avoid any overshoot or stress on the output capacitors or the power converter. The charge current starts at 128 mA, and the step size is 64 mA in CCM mode for a 10-mΩ current sensing resistor. Each step lasts around 240 µs in CCM mode until it reaches the programmed charge current limit. No external components are needed for this function. During DCM mode, the soft start up current step size is larger and each step lasts for longer time period due to the intrinsic slow response of DCM mode.

9.3.5 Converter Operation

The synchronous buck PWM converter uses a fixed-frequency voltage mode control scheme and internal type III compensation network. The LC output filter gives a characteristic resonant frequency:

Equation 1.

The resonant frequency (f_o) is used to determine the compensation to ensure there is sufficient phase margin and gain margin for the target bandwidth. The LC output filter should be selected to give a resonant frequency of 10–20 kHz nominal for the best performance. Suggested component value as charge current of 750-kHz default switching frequency is shown in Table 1.

Ceramic capacitors show a DC-bias effect. This effect reduces the effective capacitance when a DC-bias voltage is applied across a ceramic capacitor, as on the output capacitor of a charger. The effect may lead to a significant capacitance drop, especially for high output voltages and small capacitor packages. See the manufacturer's data sheet about the performance with a DC-bias voltage applied. It may be necessary to choose a higher voltage rating or nominal capacitance value in order to get the required value at the operating point.

The bq24735 has three loops of regulation: input current, charge current and charge voltage. The three loops are brought together internally at the error amplifier. The maximum voltage of the three loops appears at the output of the error amplifier EAO. An internal saw-tooth ramp is compared to the internal error control signal EAO (see Functional Block Diagram) to vary the duty-cycle of the converter. The ramp has offset of 200 mV in order to allow 0% duty-cycle.

When the battery charge voltage approaches the input voltage, EAO signal is allowed to exceed the saw-tooth ramp peak in order to get a 100% duty-cycle. If voltage across BTST and PHASE pins falls below 4.3 V, a refresh cycle starts and low-side N-channel power MOSFET is turned on to recharge the BTST capacitor. It can achieve duty cycle of up to 99.5%.

9.3.6 Input Overcurrent Protection (ACOC)

The bq24735 cannot maintain the input current level if the charge current has been already reduced to zero. After the system current continues increasing to the 3.33× of input current DAC set point (with 4.2-ms blank-out time), ACFET/RBFET is latches off and an adapter removal and system shutdown is required to force ACDET < 0.6 V to reset IC. After IC reset from latch off, ACFET/RBFET can be turned on again.

The ACOC function threshold can be set to 3.33× of input DPM current or disable this function through SMBus command (ChargeOption() bit [1]).

9.3.7 Charge Overcurrent Protection (CHGOCP)

The bq24735 has a cycle-by-cycle peak overcurrent protection. The device monitors the voltage across SRP and SRN, and prevents the current from exceeding of the threshold based on the DAC charge current set point. The high-side gate drive turns off for the rest of the cycle when the overcurrent is detected, and resumes when the next cycle starts.

The charge OCP threshold is automatically set to 6 A, 9 A, and 12 A on a 10-mΩ current-sensing resistor based on charge current register value. This prevents the threshold to be too high which is not safe or too low which can be triggered in normal operation. Proper inductance should be selected to prevent OCP triggered in normal operation due to high inductor current ripple.

9.3.8 Battery Overvoltage Protection (BATOVP)

The bq24735 will not allow the high-side and low-side MOSFET to turn on when the battery voltage at SRN exceeds 104% of the regulation voltage set-point. If BATOVP last more than 30 ms, the charger is completely disabled. This allows quick response to an overvoltage condition – such as occurs when the load is removed or the battery is disconnected. A 4-mA current sink from SRP to GND is on only during BATOVP and allows discharging the stored output inductor energy that is transferred to the output capacitors. Setting ChargeVoltage() register value to 0 V will not trigger BATOVP function.

9.3.9 Battery Shorted to Ground (BATLOWV)

The bq24735 will limit inductor current if the battery voltage on SRN falls below 2.5 V after 1-ms charge is reset. After 4-5 ms, the charge is resumed with soft start if all the enable conditions in Enable and Disable Charging are satisfied. This prevents any overshoot current in inductor which can saturate inductor and may damage the MOSFET. The charge current is limited to 0.5 A on 10-mΩ current-sensing resistor when BATLOWV condition persists and LSFET remains off. The LSFET turns on only for a refreshing pulse to charge the BTST capacitor.

9.3.10 Thermal Shutdown Protection (TSHUT)

The QFN package has low thermal impedance, which provides good thermal conduction from the silicon to the ambient, to keep junctions temperatures low. As added level of protection, the charger converter turns off for self-protection whenever the junction temperature exceeds the 155°C. The charger stays off until the junction temperature falls below 135°C. During thermal shutdown, the REGN LDO current limit is reduced to 16 mA. Once the temperature falls below 135°C, charge can be resumed with soft start.

9.3.11 Inductor Short, MOSFET Short Protection

The bq24735 has a unique short-circuit protection feature. Its cycle-by-cycle current monitoring feature is achieved through monitoring the voltage drop across R_DS(on) of the MOSFETs after a certain amount of blanking time. In case of MOSFET short or inductor short circuit, the overcurrent condition is sensed by two comparators and two counters will be triggered. After seven times of short circuit events, the charger will be latched off and ACFET and RBFET are turned off to disconnect adapter from system. BATFET is turned on to connect battery pack to system. To reset the charger from latch-off status, the IC VCC pin must be pulled below UVLO or the ACDET pin must be pulled below 0.6 V. This can be achieved by removing the adapter and shutting down the operation system. The low-side MOSFET short circuit voltage drop threshold can be adjusted through SMBus command. ChargeOption() bit [7] = 0, 1 sets the low-side threshold to 135 mV and 230 mV, respectively. The high-side MOSFET short circuit voltage drop threshold can be adjusted through SMBus command. ChargeOption() bit [8] = 0, 1 disables the function and sets the threshold to 750 mV, respectively. During boost function, if the low-side MOSFET short-circuit protection threshold is used for cycle-by-cycle current limiting, the charger will not latch up.

Due to the certain amount of blanking time to prevent noise when MOSFET just turns on, the cycle-by-cycle charge overcurrent protection may detect high current and turn off MOSFET first before the short circuit protection circuit can detect short condition because the blanking time has not finished. In such a case, the charger may not be able to detect short circuit and counter may not be able to count to seven then latch off. Instead, the charger may continuously keep switching with very narrow duty cycle to limit the cycle-by-cycle current peak value. However, the charger should still be safe and will not cause failure because the duty cycle is limited to a very short of time and MOSFET should be still inside the safety operation area. During a soft start period, it may take a long time instead of just seven switching cycles to detect short circuit based on the same blanking time reason.

9.4.1 Enable and Disable Charging

In Charge mode, the following conditions have to be valid to start charge:

• Charge is enabled through SMBus (ChargeOption() bit [0] = 0, default is 0, charge enabled).
• ILIM pin voltage is higher than 105 mV.
• All three regulation limit DACs have valid value programmed.
• ACOK is valid (see Adapter Detect and ACOK Output for details).
• ACFET and RBFET turns on and gate voltage is high enough (see System Power Selection for details).
• V_SRN does not exceed BATOVP threshold.
• IC Temperature does not exceed TSHUT threshold.
• Not in ACOC condition (see Input Overcurrent Protection (ACOC) for details).

One of the following conditions will stop ongoing charging:

• Charge is inhibited through SMBus (ChargeOption() bit [0] = 1).
• ILIM pin voltage lower than 75 mV.
• One of three regulation limit DACs is set to 0 or out of range.
• ACOK is pulled low (see Adapter Detect and ACOK Output for details).
• ACFET turns off.
• V_SRN exceeds BATOVP threshold.
• TSHUT IC temperature threshold is reached.
• ACOC is detected (see Input Overcurrent Protection (ACOC) for details).
• Short circuit is detected (see Inductor Short, MOSFET Short Protection for details).
• Watchdog timer expires if watchdog timer is enabled (see Charge Time-out for details).

9.4.2 Continuous Conduction Mode (CCM)

With sufficient charge current the bq24735’s inductor current never crosses zero, which is defined as continuous conduction mode. The controller starts a new cycle with ramp coming up from 200 mV. As long as EAO voltage is above the ramp voltage, the high-side MOSFET (HSFET) stays on. When the ramp voltage exceeds EAO voltage, HSFET turns off and low-side MOSFET (LSFET) turns on. At the end of the cycle, ramp gets reset and LSFET turns off, ready for the next cycle. There is always break-before-make logic during transition to prevent cross-conduction and shoot-through. During the dead time when both MOSFETs are off, the body-diode of the low-side power MOSFET conducts the inductor current.

During CCM mode, the inductor current is always flowing and creates a fixed two-pole system. Having the LSFET turnon keeps the power dissipation low, and allows safely charging at high currents.

9.4.3 Discontinuous Conduction Mode (DCM)

During the HSFET off time when LSFET is on, the inductor current decreases. If the current goes to zero, the converter enters Discontinuous Conduction Mode. Every cycle, when the voltage across SRP and SRN falls below 5 mV (0.5 A on 10 mΩ), the undercurrent protection comparator (UCP) turns off LSFET to avoid negative inductor current, which may boost the system via the body diode of HSFET.

During the DCM mode the loop response automatically changes. It changes to a single-pole system and the pole is proportional to the load current.

Both CCM and DCM are synchronous operation with LSFET turnon every clock cycle. If the average charge current goes below 125 mA on a 10-mΩ current sensing resistor, or the battery voltage falls below 2.5 V, the LSFET keeps turnoff. The battery charger operates in nonsynchronous mode and the current flows through the LSFET body diode. During nonsynchronous operation, the LSFET turns on only for a refreshing pulse to charge the BTST capacitor. If the average charge current goes above 250 mA on a 10-mΩ current-sensing resistor, the LSFET exits nonsynchronous mode and enters synchronous mode to reduce LSFET power loss.

9.5.1 SMBus Interface

The bq24735 device operates as a slave, receiving control inputs from the embedded controller host through the SMBus interface. The bq24735 uses a simplified subset of the commands documented in System Management Bus Specification V1.1, which can be downloaded from www.smbus.org. The bq24735 uses the SMBus Read-Word and Write-Word protocols (see Figure 12) to communicate with the smart battery. The bq24735 performs only as a SMBus slave device with address 0b00010010 (0x12H) and does not initiate communication on the bus. In addition, the bq24735 has two identification registers a 16-bit device ID register (0xFFH) and a 16-bit manufacturer ID register (0xFEH).

SMBus communication is enabled with the following conditions:

• V_VCC is above UVLO.
• V_ACDET is above 0.6 V.

The data (SDA) and clock (SCL) pins have Schmitt-trigger inputs that can accommodate slow edges. Choose pullup resistors (10 kΩ) for SDA and SCL to achieve rise times according to the SMBus specifications. Communication starts when the master signals a START condition, which is a high-to-low transition on SDA, while SCL is high. When the master has finished communicating, the master issues a STOP condition, which is a low-to-high transition on SDA, while SCL is high. The bus is then free for another transmission. Figure 13 and Figure 14 show the timing diagram for signals on the SMBus interface. The address byte, command byte, and data bytes are transmitted between the START and STOP conditions. The SDA state changes only while SCL is low, except for the START and STOP conditions. Data is transmitted in 8-bit bytes and is sampled on the rising edge of SCL. Nine clock cycles are required to transfer each byte in or out of the bq24735, because either the master or the slave acknowledges the receipt of the correct byte during the ninth clock cycle. The bq24735 supports the charger commands as described in Table 2.

Figure 12. SMBus Write-Word and Read-Word Protocols

Figure 13. SMBus Write Timing

Figure 14. SMBus Read Timing

9.5.2 Battery LEARN Cycle

A battery LEARN cycle can be activated through SMBus command (ChargeOption() bit [6] = 1 enable LEARN cycle, bit [6] = 0 disable LEARN cycle). When LEARN is enabled with ACFET/RBFET connected, the system power selector logic is overdriven to switch to battery by turning off ACFET/RBFET and turning on BATFET. LEARN function allows the battery to discharge in order to calibrate the battery gas gauge over a complete discharge/charge cycle. The controller automatically exits LEARN cycle when the battery voltage is below battery depletion threshold, and the system switches back to adapter input by turning off BATFET and turning on ACFET/RBFET. After LEARN cycle, the LEARN bit is automatically reset to 0. The battery depletion threshold can be set to 59.19%, 62.65%, 66.55%, and 70.97% of voltage regulation level through SMBus command (ChargeOption() bit [12:11]).

9.5.3 Charge Time-out

The bq24735 includes a watchdog timer to terminate charging if the charger does not receive a write ChargeVoltage() or write ChargeCurrent() command within 175 s (adjustable through ChargeOption() command). If a watchdog time-out occurs all register values keep unchanged but charge is suspended. Write ChargeVoltage() or write ChargeCurrent() commands must be resent to reset watchdog timer and resume charging. The watchdog timer can be disabled, or set to 44 s, 88 s or 175 s through SMBus command (ChargeOption() bit [14:13]). After watchdog time-out write ChargeOption() bit [14:13] to disable watchdog timer also resume charging.

9.5.4 High-Accuracy Current-Sense Amplifier

As an industry standard, high-accuracy current-sense amplifier (CSA) is used to monitor the input current or the charge current, selectable through SMBUS (ChargeOption() bit [5] = 0 select the input current, bit [5] = 1 select the charge current) by host. The CSA senses voltage across the sense resistor by a factor of 20 through the IOUT pin. Once VCC is above UVLO and ACDET is above 0.6 V, CSA turns on and IOUT output becomes valid. To lower the voltage on current monitoring, a resistor divider from IOUT to GND can be used and accuracy over temperature can still be achieved.

A 100-pF capacitor connected on the output is recommended for decoupling high-frequency noise. An additional RC filter is optional, if additional filtering is desired.

9.5.5 EMI Switching Frequency Adjust

The charger switching frequency can be adjusted ±18% to solve the EMI issue through SMBus command. ChargeOption() bit [9] = 0 disables the frequency adjust function. To enable frequency adjust function, set ChargeOption() bit [9] = 1. Set ChargeOption() bit [10] = 0 to reduce switching frequency, and set bit [10] = 1 to increase switching frequency.

If frequency is reduced for a fixed inductor, the current ripple is increased. Inductor value must be carefully selected so that it will not trigger cycle-by-cycle peak overcurrent protection, even for the worst conditions such as higher input voltage, 50% duty cycle, lower inductance, and lower switching frequency.

9.6.1 Battery-Charger Commands

The bq24735 supports six battery-charger commands that use either Write-Word or Read-Word protocols, as summarized in Table 2. ManufacturerID() and DeviceID() can be used to identify the bq24735. The ManufacturerID() command always returns 0x0040H and the DeviceID() command always returns 0x001BH.

9.6.2 Setting Charger Options

By writing ChargeOption() command (0x12H or 0b00010010), bq24735 allows users to change several charger options after POR (Power On Reset) as shown in Table 3.

9.6.3 Charge Options Register [reset = 0x12H]

9.6.4 Setting the Charge Current

To set the charge current, write a 16-bit ChargeCurrent() command (0x14H or 0b00010100) using the data format listed in Table 4. With 10-mΩ sense resistor, the bq24735 provides a charge current range of 128 mA to 8.128 A, with 64-mA step resolution. Sending ChargeCurrent() below 128 mA or above 8.128 A clears the register and terminates charging. Upon POR, charge current is 0 A. TI recommends a 0.1-µF capacitor between SRP and SRN for differential mode filtering, a 0.1-µF capacitor between SRN and ground for common mode filtering, and an optional 0.1-µF capacitor between SRP and ground for common mode filtering. Meanwhile, the capacitance on SRP should not be higher than 0.1 µF to properly sense the voltage across SRP and SRN for cycle-by-cycle undercurrent and overcurrent detection.

The SRP and SRN pins are used to sense R_SR with default value of 10 mΩ. However, resistors of other values can also be used. For a larger sense resistor, a larger sense voltage is given, and a higher regulation accuracy; but, at the expense of higher conduction loss. If the current-sensing resistor value is too high, it may trigger an overcurrent protection threshold because the current ripple voltage is too high. In such a case, either a higher inductance value or a lower current-sensing resistor value should be used to limit the current ripple voltage level. A current-sensing resistor value no more than 20 mΩ is suggested.

To provide secondary protection, the bq24735 has an ILIM pin with which the user can program the maximum allowed charge current. Internal charge current limit is the lower one between the voltage set by ChargeCurrent(), and voltage on ILIM pin. To disable this function, the user can pull ILIM above 1.6 V, which is the maximum charge current regulation limit. Equation 2 shows the voltage set on the ILIM pin with respect to the preferred charge current limit:

Equation 2.

9.6.5 Setting the Charge Voltage

To set the output charge regulation voltage, write a 16-bit ChargeVoltage() command (0x15H or 0b0001#0101) using the data format listed in Table 5. The bq24735 provides charge voltage range from 1.024 V to 19.200 V, with a 16-mV step resolution. Sending ChargeVoltage() below 1.024 V or above 19.2 V clears the register and terminates charging. Upon POR, charge voltage limit is 0 V.

The SRN pin is used to sense the battery voltage for voltage regulation and should be connected as close to the battery as possible. Place a decoupling capacitor (0.1 µF recommended) as close to the IC as possible to decouple high-frequency noise.

9.6.6 Setting Input Current

System current normally fluctuates as portions of the system are powered up or put to sleep. With the input current limit, the output current requirement of the AC wall adapter can be lowered, reducing system cost.

The total input current, from a wall cube or other DC source, is the sum of the system supply current and the current required by the charger. When the input current exceeds the set input current limit, the bq24735 decreases the charge current to provide priority to system load current. As the system current rises, the available charge current drops linearly to zero. Thereafter, all input current goes to system load and input current increases.

During DPM regulation, the total input current is the sum of the device supply current I_BIAS, the charger input current, and the system load current I_LOAD, and can be estimated as follows:

Equation 3.

where

• η is the efficiency of the charger buck converter (typically 85% to 95%).

To set the input current limit, write a 16-bit InputCurrent() command (0x3FH or 0b0011#1111) using the data format listed in Table 6. When using a 10-mΩ sense resistor, the bq24735 provides an input current-limit range of 128 mA to 8.064 A, with 128-mA resolution. The suggested input current limit is set to no less than 512 mA. Sending InputCurrent() below 128 mA or above 8.064 A clears the register and terminates charging. Upon POR, the default input current limit is 4096 mA.

The ACP and ACN pins are used to sense R_AC with default value of 10 mΩ. However, resistors of other values can also be used. For a larger sense resistor, larger sense voltage is given, and a higher regulation accuracy; but, at the expense of higher conduction loss.

If input current rises above FAST_DPM threshold, the charger will reduce charging current to allow the input current drop. After a typical 260-µs delay time, if input current is still above FAST_DPM threshold, the charger will shut down. When the system load current becomes smaller, the charger will soft restart to charge the battery if the adapter still has power to charge the battery. This prevents a crash if the adapter is overloaded when the system has a high and fast loading transient. The waiting time between shut down and restart charging is a natural response time of the input current limit loop.

9.6.7 Support Turbo Boost Function

The bq24735 supports Turbo Boost function when the adapter is above 16 V. During Turbo Boost mode, battery discharge energy is delivered to system when system power demand is temporarily higher than adapter maximum power level so that adapter will not crash. After POR, the ChargeOption() bit [3] is 0 which disable Turbo Boost function. To enable it, the ChargeOption() bit [3] must be written to 1 by the host.

When input current is higher than the FAST_DPM comparator threshold, if Turbo Boost function is enabled, charger IC will allow battery discharge and charger converter will change from buck converter to boost converter. During Turbo Boost mode the adapter current is regulated at input current limit level so that adapter will not crash. The battery discharge current depends on system current requirement and adapter current limit. The SMBus timer can be enabled to prevent converter running at Turbo Boost mode for too long.