ZHCSE45C July 2015 – May 2018
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說(shuō)明
- 4 修訂歷史記錄
- 5 說(shuō)明 （續(xù)）
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
- 8 Specifications
-
9 Detailed Description
- 9.1 Functional Block Diagram
- 9.2
Feature Description
- 9.2.1 Device Power-On-Reset (POR)
- 9.2.2 Device Power Up from Battery without Input Source
- 9.2.3 Device Power Up from Input Source
- 9.2.4 Input Current Optimizer (ICO)
- 9.2.5 Boost Mode Operation from Battery
- 9.2.6 Power Path Management
- 9.2.7 Battery Charging Management
- 9.2.8 Battery Monitor
- 9.2.9 Status Outputs (PG, STAT, and INT)
- 9.2.10 BATET (Q4) Control
- 9.2.11 Current Pulse Control Protocol
- 9.2.12 Input Current Limit on ILIM
- 9.2.13 Thermal Regulation and Thermal Shutdown
- 9.2.14 Voltage and Current Monitoring in Buck and Boost Mode
- 9.2.15 Battery Protection
- 9.2.16 Serial Interface
- 9.3 Device Functional Modes
- 9.4 Register Maps
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13器件和文檔支持
- 14機(jī)械、封裝和可訂購(gòu)信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RTW|24
散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RTW|24
訂購(gòu)信息
9.3.1 Host Mode and Default Mode
The device is a host controlled charger, but it can operate in default mode without host management. In default mode, the device can be used an autonomous charger with no host or while host is in sleep mode. When the charger is in default mode, WATCHDOG_FAULT bit is HIGH. When the charger is in host mode, WATCHDOG_FAULT bit is LOW.
After power-on-reset, the device starts in default mode with watchdog timer expired, or default mode. All the registers are in the default settings.
In default mode, the device keeps charging the battery with 12-hour fast charging safety timer. At the end of the 12-hour, the charging is stopped and the buck converter continues to operate to supply system load. Any write command to device transitions the charger from default mode to host mode. All the device parameters can be programmed by the host. To keep the device in host mode, the host has to reset the watchdog timer by writing 1 to WD_RST bit before the watchdog timer expires (WATCHDOG_FAULT bit is set), or disable watchdog timer by setting WATCHDOG bits=00.
When the watchdog timer (WATCHDOG_FAULT bit = 1) is expired, the device returns to default mode and all registers are reset to default values except IINLIM, VINDPM, VINDPM_OS, BATFET_RST_EN, BATFET_DLY, and BATFET_DIS bits.
Figure 24. Watchdog Timer Flow Chart