Table 2. Boost Regulator Frequency Analysis

	SIMPLIFIED FORMULA	COMPREHENSIVE FORMULA(1)
MODULATOR TRANSER FUNCTION
Modulator DC gain (2)
RHP zero (2)
ESR zero
ESR pole	Not considered
Dominant load pole
Sampled gain inductor pole	Not considered	or
Quality factor	Not considered
Sub-harmonic double pole	Not considered	or
K factor	K = 1
FEEDBACK TRANSFER FUNCTION
Feedback DC gain
Mid-band Gain
Low frequency zero
High frequency pole
OPEN LOOP RESPONSE
Crossover frequency (3) (Open loop band width)		Use graphic tool
Maximum cross over frequency(4)		or , whichever is smaller

(2) With multiphase configuration, , , , and C_OUT = C_OUT of each phase x n, where n = number of phases. As is the current sense amplifier gain.

(3) Assuming , , , , and .

8.2.2.1 Custom Design With WEBENCH® Tools

Click here to create a custom design using the LM5122 device with the WEBENCH® Power Designer.

1. Start by entering the input voltage (V_IN), output voltage (V_OUT), and output current (I_OUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.

The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability.

In most cases, these actions are available:

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8.2.2.2 Timing Resistor R_T

Generally, higher frequency applications are smaller but have higher losses. Operation at 250 kHz is selected for this example as a reasonable compromise between small size and high-efficiency. The value of R_T for 250 kHz switching frequency is calculated as follows:

Equation 23.

A standard value of 36.5 kΩ is chosen for R_T.

8.2.2.3 UVLO Divider R_UV2, R_UV1

The desired startup voltage and the hysteresis are set by the voltage divider R_UV2, R_UV1. The UVLO shutdown voltage should be high enough to enhance the low-side N-channel MOSFET switch fully. For this design, the startup voltage is set to 8.7 V which is 0.3 V below V_IN(MIN). V_HYS is set to 0.5 V. This results 8.2 V of V_IN(SHUTDOWN). The values of R_UV2, R_UV1 are calculated as follows:

8.2.2.4 Input Inductor L_IN

The inductor ripple current is typically set between 20% and 40% of the full load current, known as a good compromise between core loss and copper loss of the inductor. Higher ripple current allows for a smaller inductor size, but places more of a burden on the output capacitor to smooth the ripple voltage on the output. For this example, a ripple ratio (RR) of 0.25, 25% of the input current was chosen. Knowing the switching frequency and the typical output voltage, the inductor value can be calculated as follows:

Equation 26.

The closest standard value of 10 μH was chosen for L_IN.

The saturation current rating of inductor should be greater than the peak inductor current, which is calculated at the minimum input voltage and full load. 8.7 V startup voltage is used conservatively.

Equation 27.

8.2.2.5 Current Sense Resistor R_S

The maximum peak input current capability should be 20~50% higher than the required peak current at low input voltage and full load, accounting for tolerances. For this example, 40% is margin is chosen.

Equation 28.

A closest standard value of 4 mΩ is selected for R_S. The maximum power loss of R_S is calculated as follows.

Equation 29.

8.2.2.6 Current Sense Filter R_CSFP, R_CSFN, C_CS

The current sense filter is optional. 100 pF of C_CS and 100 Ω of R_CSFP, R_CSFN are normal recommendations. Because CSP and CSN pins are high impedance, C_CS should be placed physically as close to the device.

Figure 41. Current Sense Filter

8.2.2.7 Slope Compensation Resistor R_SLOPE

The K value is selected to be 1 at the minimum input voltage. R_SLOPE should be carefully selected so that the sum of sensed inductor current and slope compensation is less than COMP output high voltage.

Equation 30.

Equation 31.

A closest standard value of 100 kΩ is selected for R_SLOPE.

8.2.2.8 Output Capacitor C_OUT

The output capacitors smooth the output voltage ripple and provide a source of charge during transient loading conditions. Also the output capacitors reduce the output voltage overshoot when the load is disconnected suddenly.

Ripple current rating of output capacitor should be carefully selected. In boost regulator, the output is supplied by discontinuous current and the ripple current requirement is usually high. In practice, the ripple current requirement can be dramatically reduced by placing high-quality ceramic capacitors earlier than the bulk aluminum capacitors close to the power switches.

The output voltage ripple is dominated by ESR of the output capacitors. Paralleling output capacitor is a good choice to minimize effective ESR and split the output ripple current into capacitors.

In this example, three 330 µF aluminum capacitors are used to share the output ripple current and source the required charge. The maximum output ripple current can be simply calculated at the minimum input voltage as follows:

Equation 32.

Assuming 60 mΩ of ESR per an output capacitor, the output voltage ripple at the minimum input voltage is calculated as follows:

Equation 33.

In practice, four 10-µF ceramic capacitors are additionally placed earlier than the bulk aluminum capacitors to reduce the output voltage ripple and split the output ripple current.

Due to the inherent path from input to output, unlimited inrush current can flow when the input voltage rises quickly and charges the output capacitor. The slew rate of input voltage rising should be controlled by a hot-swap or by starting the input power supply softly for the inrush current not to damage the inductor, sense resistor or high-side N-channel MOSFET switch.

8.2.2.9 Input Capacitor C_IN

The input capacitors smooth the input voltage ripple. Assuming high-quality ceramic capacitors are used for the input capacitors, the maximum input voltage ripple which happens when the input voltage is half of the output voltage can be calculated as follows:

Equation 34.

The value of input capacitor is also a function of source impedance, the impedance of source power supply. The more input capacitor will be required to prevent a chatter condition upon power up if the impedance of source power supply is not enough low.

8.2.2.10 VIN Filter R_VIN, C_VIN

An R-C filter (R_VIN, C_VIN) on VIN pin is optional. It is not required if C_IN capacitors are high-quality ceramic capacitors and placed physically close to the device. The filter helps to prevent faults caused by high frequency switching noise injection into the VIN pin. A 0.47 μF ceramic capacitor is used this example. 3 Ω of R_VIN and 0.47 µF of C_VIN are normal recommendations. A larger filter with 2.2 µ~4.7 µF C_VIN is recommended when the input voltage is lower than 8 V or the required duty cycle is close to the maximum duty cycle limit.

Figure 42. VIN Filter

8.2.2.11 Bootstrap Capacitor C_BST and Boost Diode D_BST

The bootstrap capacitor between the BST and SW pin supplies the gate current to charge the high-side N-channel MOSFET device gate during each cycle’s turn-on and also supplies recovery charge for the bootstrap diode. These current peaks can be several amperes. The recommended value of the bootstrap capacitor is 0.1 μF. C_BST must be a good-quality, low-ESR, ceramic capacitor located at the pins of the device to minimize potentially damaging voltage transients caused by trace inductance. The minimum value for the bootstrap capacitor is calculated as follows:

Equation 35.

where

• Q_G is the high-side N-channel MOSFET gate charge
• ΔV_BST is the tolerable voltage droop on C_BST, which is typically less than 5% of VCC or 0.15 V, conservatively

In this example, the value of the BST capacitor (C_BST) is 0.1 µF.

The voltage rating of D_BST must be greater than the peak SW node voltage plus 16 V. A low leakage diode is mandatory for the bypass operation. The leakage current of D_BST must be low enough for the BST charge pump to maintain a sufficient high-side driver supply voltage at high temperature. A low leakage diode also prevents the possibility of excessive VCC voltage during shutdown, in high output voltage applications. If the leakage is excessive, a zener VCC clamp or bleed resistor may be required. High-side driver supply voltage must be greater than the high-side N-channel MOSFET switch’s gate plateau at the minimum input voltage.

8.2.2.12 VCC Capacitor C_VCC

The primary purpose of the VCC capacitor is to supply the peak transient currents of the LO driver and bootstrap diode as well as provide stability for the VCC regulator. These peak currents can be several amperes. The value of C_VCC must be at least 10 times greater than the value of C_BST and should be a good-quality, low-ESR, ceramic capacitor. Place C_VCC close to the pins of the device to minimize potentially damaging voltage transients caused by trace inductance. A value of 4.7 µF was selected for this design example.

8.2.2.13 Output Voltage Divider R_FB1, R_FB2

R_FB1 and R_FB2 set the output voltage level. The ratio of these resistors is calculated as follows:

Equation 36.

The ratio between R_COMP and R_FB2 determines the mid-band gain, A_{FB_MID}. A larger value for R_FB2 may require a corresponding larger value for R_COMP. R_FB2 should be large enough to keep the total divider power dissipation small. 49.9 kΩ in series with 825 Ω was chosen for high-side feedback resistors in this example, which results in a R_FB1 value of 2.67 kΩ for 24-V output.

8.2.2.14 Soft-Start Capacitor C_SS

The soft-start time (t_SS) is the time for the output voltage to reach the target voltage from the input voltage. The soft-start time is not only proportional with the soft-start capacitor, but also depends on the input voltage. With 0.1 µF of C_SS, the soft-start time is calculated as follows:

Equation 37.

Equation 38.

8.2.2.15 Restart Capacitor C_RES

The restart capacitor determines restart delay time t_RD and hiccup mode off time t_RES (see Figure 26). t_RD must be greater than t_SS(MAX). The minimum required value of C_RES can be calculated at the low input voltage as follows:

Equation 39.

A standard value of 0.47 µF is selected for C_RES.

8.2.2.16 Low-Side Power Switch Q_L

Selection of the power N-channel MOSFET devices by breaking down the losses is one way to compare the relative efficiencies of different devices. Losses in the low-side N-channel MOSFET device can be separated into conduction loss and switching loss.

Low-side conduction loss is approximately calculated as follows:

Equation 40.

Where, D is the duty cycle and the factor of 1.3 accounts for the increase in the N-channel MOSFET device on-resistance due to heating. Alternatively, the factor of 1.3 can be eliminated and the high temperature on-resistance of the N-channel MOSFET device can be estimated using the R_DS(ON) vs temperature curves in the N-channel MOSFET datasheet.

Switching loss occurs during the brief transition period as the low-side N-channel MOSFET device turns on and off. During the transition period both current and voltage are present in the channel of the N-channel MOSFET device. The low-side switching loss is approximately calculated as follows:

Equation 41.

t_R and t_F are the rise and fall times of the low-side N-channel MOSFET device. The rise and fall times are usually mentioned in the N-channel MOSFET data sheet or can be empirically observed with an oscilloscope.

An additional Schottky diode can be placed in parallel with the low-side N-channel MOSFET switch, with short connections to the source and drain in order to minimize negative voltage spikes at the SW node.

8.2.2.17 High-Side Power Switch Q_H and Additional Parallel Schottky Diode

Losses in the high-side N-channel MOSFET device can be separated into conduction loss, dead-time loss, and reverse recovery loss. Switching loss is calculated for the low-side N-channel MOSFET device only. Switching loss in the high-side N-channel MOSFET device is negligible because the body diode of the high-side N-channel MOSFET device turns on before and after the high-side N-channel MOSFET device switches.

High-side conduction loss is approximately calculated as follows:

Equation 42.

Dead-time loss is approximately calculated as follows:

Equation 43.

where

• V_D is the forward voltage drop of the high-side NMOS body diode.

Reverse recovery characteristics of the high-side N-channel MOSFET switch strongly affect efficiency, especially when the output voltage is high. Small reverse recovery charge helps to increase the efficiency while also minimizes switching noise.

Reverse recovery loss is approximately calculated as follows:

Equation 44.

An additional Schottky diode can be placed in parallel with the high-side switch to improve efficiency. Usually, the power rating of this parallel Schottky diode can be less than the high-side switch’s because the diode conducts only during dead-times. The power rating of the parallel diode should be equivalent or higher than high-side switch’s if bypass operation is required, hiccup mode operation is required or any load exists before switching.

8.2.2.18 Snubber Components

A resistor-capacitor snubber network across the high-side N-channel MOSFET device reduces ringing and spikes at the switching node. Excessive ringing and spikes can cause erratic operation and can couple noise to the output voltage. Selecting the values for the snubber is best accomplished through empirical methods. First, make sure the lead lengths for the snubber connections are very short. Start with a resistor value between 5 and 50 Ω. Increasing the value of the snubber capacitor results more damping, but this also results higher snubber losses. Select a minimum value for the snubber capacitor that provides adequate damping of the spikes on the switch waveform at heavy load. A snubber may not be necessary with an optimized layout.

8.2.2.19 Loop Compensation Components C_COMP, R_COMP, C_HF

R_COMP, C_COMP and C_HF configure the error amplifier gain and phase characteristics to produce a stable voltage loop. For a quick start, follow the following 4 steps:

1. Select f_CROSS

Select the cross over frequency (f_CROSS) at one fourth of the RHP zero or one tenth of the switching frequency whichever is lower.

Equation 46.
Equation 47.

5.3 kHz of the crossover frequency is selected between two. RHP zero at minimum input voltage should be considered if the input voltage range is wide.

2. Determine required R_COMP

Knowing f_CROSS, R_COMP is calculated as follows:

Equation 48.

A standard value of 68.1 kΩ is selected for R_COMP

3. Determine C_COMP to cancel load pole. Place error amplifier zero at the twice of load pole frequency. Knowing R_COMP, C_COMP is calculated as follows:
Equation 49.

A standard value of 22 nF is selected for C_COMP

4. Determine C_HF to cancel ESR zero.

Knowing R_COMP, R_ESR and C_COMP, C_HF is calculated as follows:

Equation 50.

A standard value of 330 pF is selected for C_HF.