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ZHCSNB2 February 2021 SN55LVCP22A-SP

PRODUCTION DATA

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

W|16
- MCFP004C

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購(gòu)信息

6.6 Switching Characteristics

over recommended operating conditions unless otherwise noted

parameter		TEST CONDITIONS	MIN	TYP	MAX	UNIT
t_SET	Input to SEL setup time	See GUID-DFC33E3A-CD0C-47EA-9546-39403915B952.html#IDIOZO-9FXRHU		0.8	2.2	ns
t_HOLD	Input to SEL hold time	See GUID-DFC33E3A-CD0C-47EA-9546-39403915B952.html#IDIOZO-9FXRHU		1.0	2.2	ns
t_SWITCH	SEL to switched output	See GUID-DFC33E3A-CD0C-47EA-9546-39403915B952.html#IDIOZO-9FXRHU		1.7	2.6	ns
t_PHZ	Disable time, high-level-to-high-impedance	See GUID-DFC33E3A-CD0C-47EA-9546-39403915B952.html#IDPPZO-21CXRHU		2	8	ns
t_PLZ	Disable time, low-level-to-high-impedance	See GUID-DFC33E3A-CD0C-47EA-9546-39403915B952.html#IDPPZO-21CXRHU		2	8	ns
t_PZH	Enable time, high-impedance -to-high-level output	See GUID-DFC33E3A-CD0C-47EA-9546-39403915B952.html#IDPPZO-21CXRHU		2	8	ns
t_PZL	Enable time, high-impedance-to-low-level output	See GUID-DFC33E3A-CD0C-47EA-9546-39403915B952.html#IDPPZO-21CXRHU		2	8	ns
t_LHT	Differential output signal rise time (20%-80%)#IDHYWK-35FX000	C_L = 5 pF, See GUID-DFC33E3A-CD0C-47EA-9546-39403915B952.html#IDBRZO-B2XRHU		280	620	ps
t_HLT	Differential output signal fall time (20%-80%)#IDHYWK-35FX000	C_L = 5 pF, See GUID-DFC33E3A-CD0C-47EA-9546-39403915B952.html#IDBRZO-B2XRHU		280	620	ps
t_JIT	Added peak-to-peak jitter#SLLSE437856	V_ID = 200 mV, 50% duty cycle, V_CM= 1.2 V, 50 MHz, C_L = 5 pF		13.7	22.2	ps
		V_ID = 200 mV, 50% duty cycle, V_CM= 1.2 V, 240 MHz, C_L = 5 pF		13.4	24.5
		V_ID = 200 mV, 50% duty cycle, V_CM= 1.2 V, 500 MHz, C_L = 5 pF		14.4	35.7
		V_ID = 200 mV, PRBS = 2¹⁵-1 data pattern, V_CM= 1.2 V, 240 Mbps, C_L = 5 pF		68.3	204	ps
		V_ID = 200 mV, PRBS = 2¹⁵-1 data pattern, V_CM= 1.2 V, 1000 Mbps, C_L = 5 pF		73.2	282	ps
t_Jrms	Added random jitter (rms)#SLLSE437856	V_ID = 200 mV, 50% duty cycle, V_CM= 1.2 V, 50 MHz, C_L = 5 pF		0.97	1.5	ps_RMS
		V_ID = 200 mV, 50% duty cycle, V_CM= 1.2 V, 240 MHz, C_L = 5 pF		0.85	1.53
		V_ID = 200 mV, 50% duty cycle, V_CM= 1.2 V, 500 MHz, C_L = 5 pF		0.86	1.79
t_PLHD	Propagation delay time, low-to-high-level output#IDHYWK-35FX000		200	650	2350	ps
t_PHLD	Propagation delay time, high-to-low-level output#IDHYWK-35FX000		200	650	2350	ps
t_skew #IDHJWER1234564	Pulse skew (\|t_PLHD – t_PHLD\|)#IDGIBUY26CA075	C_L = 5 pF, See GUID-DFC33E3A-CD0C-47EA-9546-39403915B952.html#IDBRZO-B2XRHU		45	160	ps
t_CCS	Output channel-to-channel skew, splitter mode	C_L = 5 pF, See GUID-DFC33E3A-CD0C-47EA-9546-39403915B952.html#IDBRZO-B2XRHU		80		ps
f_MAX #IDHJWER1234564	Maximum operating frequency#IDOYQX-289X000		1			GHz

(1) Input: V_IC = 1.2 V, V_ID = 200 mV, 50% duty cycle, 1 MHz, t_r/t_f = 500 ps

(2) t_skew is the magnitude of the time difference between the t_PLHD and t_PHLD of any output of a single device.

(3) Not production tested.

(4) Signal generator conditions: 50% duty cycle, t_r or t_f ≤ 100 ps (10% to 90%), transmitter output criteria: duty cycle = 45% to 55% V_OD≥ 300 mV.

(5) t_skew and f_MAX parameters are guaranteed by characterization, but not production tested.