SLLS994B February 2010 – July 2015 SN65HVDA1050A-Q1
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- D|8
散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)| MIN | MAX | UNIT | ||
|---|---|---|---|---|
| VCC | Supply voltage(2) | –0.3 | 6 | V |
| Voltage at any bus terminal [CANH, CANL, SPLIT (VREF)] | –27 | 40 | V | |
| IO | Receiver output current | 20 | mA | |
| VI | Voltage input, ISO 7637 transient pulse(3) (CANH, CANL) | –150 | 100 | V |
| VI | Voltage input (TXD, S) | –0.3 | 6 | V |
| TJ | Junction temperature | –40 | 150 | °C |
| Tstg | Storage temperature | –65 | 150 | °C |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to the network ground terminal.
(3) Tested in accordance with ISO 7637 test pulses 1, 2, 3a, 3b per IBEE system level test (Pulse 1 = –100 V, Pulse 2 = 100 V, Pulse 3a = –150 V, Pulse 3b = 100 V). If DC may be coupled with AC transients, externally protect the bus pins within the absolute maximum voltage range at any bus terminal. This device has been tested with DC bus shorts to 40 V with leading common-mode chokes. If common-mode chokes are used in the system and the bus lines may be shorted to DC, ensure that the choke type and value in combination with the node termination and shorting voltage either do not create inductive flyback outside of voltage maximum specification or use an external transient-suppression circuit to protect the transceiver from the inductive transients.
6.2 ESD Ratings
| VALUE | UNIT | ||||
|---|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human body model (HBM), per AEC Q100-002(1) | Bus pins(2): Pin 7 (CANH) and Pin 6 (CANL) |
±12000 | V |
| Pin 5 [SPLIT (VREF)](3) | ±10000 | ||||
| All pins | ±4000 | ||||
| Charged-device model (CDM), per AEC Q100-011 | ±1500 | ||||
| Machine model(4) | ±200 | ||||
| IEC 61400-4-2 according to IBEE CAN EMC test specification | Bus pins to GND: Pin 7 (CANH) and Pin 6 (CANL) | ±7000 | |||
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
(2) Test method based upon JEDEC Standard 22 Test Method A114F and AEC-Q100-002, CANH and CANL bus pins stressed with respect to each other and GND.
(3) Test method based upon JEDEC Standard 22 Test Method A114F and AEC-Q100-002, SPLIT pin stressed with respect to GND.
(4) Tested in accordance JEDEC Standard 22, Test Method A115A.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| VCC | Supply voltage | 4.75 | 5.25 | V | |
| VI or VIC | Voltage at any bus terminal (separately or common mode) | –12 | 12 | V | |
| VIH | High-level input voltage | TXD, S | 2 | 5.25 | V |
| VIL | Low-level input voltage | TXD, S | 0 | 0.8 | V |
| VID | Differential input voltage | –6 | 6 | V | |
| IOH | High-level output current | Driver | –70 | mA | |
| Receiver (RXD) | –2 | ||||
| IOL | Low-level output current | Driver | 70 | mA | |
| Receiver (RXD) | 2 | ||||
| TA | Operating free-air temperature | See Power Dissipation Characteristics | –40 | 125 | °C |
6.4 Thermal Information
| THERMAL METRIC(1) | SN65HVDA1050A-Q1 | UNIT | ||
|---|---|---|---|---|
| D (SOIC) | ||||
| 8 PINS | ||||
| RθJA | Junction-to-ambient thermal resistance | Low-K thermal resistance(2) | 211 | °C/W |
| High-K thermal resistance(2) | 109 | °C/W | ||
| RθJC(top) | Junction-to-case (top) thermal resistance | 49.2 | °C/W | |
| RθJB | Junction-to-board thermal resistance | 50.3 | °C/W | |
| ψJT | Junction-to-top characterization parameter | 8 | °C/W | |
| ψJB | Junction-to-board characterization parameter | 49.6 | °C/W | |
| RθJC(bot) | Junction-to-case (bottom) thermal resistance | 49.2 | °C/W | |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) Tested in accordance with the low-K (EIA/JESD51-3) or high-K (EIA/JESD51-7) thermal metric definitions for leaded surface-mount packages.
6.5 Electrical Characteristics
over recommended operating conditions, TA = –40 to 125°C (unless otherwise noted)| PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| SUPPLY | |||||||
| ICC | 5-V supply current | Silent mode | S at VCC, VI = VCC | 6 | 10 | mA | |
| Dominant | VI = 0 V, 60-Ω load, S = 0 V | 50 | 70 | ||||
| Recessive | VI = VCC, No load, S = 0 V | 6 | 10 | ||||
| UVCC | Undervoltage reset threshold | 2.8 | 4 | V | |||
| DRIVER | |||||||
| VO(D) | Bus output voltage (dominant) | CANH | VI = 0 V, S = 0 V, RL = 60 Ω (see Figure 3 and Figure 14) | 2.9 | 3.4 | 4.5 | V |
| CANL | 0.8 | 0.85 | 1.2 | 1.5 | |||
| VO(R) | Bus output voltage (recessive) | VI = 3 V, S = 0 V, RL = 60 Ω (see Figure 3 and Figure 14) | 2 | 2.3 | 3 | V | |
| VOD(D) | Differential output voltage (dominant) | VI = 0 V, RL = 60 Ω, S = 0 V (see Figure 3, Figure 14, and Figure 4) | 1.5 | 3 | V | ||
| VI = 0 V, RL = 45 Ω, S = 0 V (see Figure 3, Figure 14, and Figure 4) | 1.4 | 3 | V | ||||
| VOD(R) | Differential output voltage (recessive) | VI = 3 V, S = 0 V (see Figure 3 and Figure 14) | –0.012 | 0.012 | V | ||
| VI = 3 V, S = 0 V, No Load | –0.5 | 0.05 | |||||
| VOC(ss) | Steady-state common-mode output voltage | S = 0 V (see Figure 9) | 2 | 2.3 | 3 | V | |
| ΔVOC(ss) | Change in steady-state common-mode output voltage | S = 0 V (see Figure 9) | 30 | mV | |||
| VIH | High-level input voltage, TXD input | 2 | V | ||||
| VIL | Low-level input voltage, TXD input | 0.8 | V | ||||
| IIH | High-level input current, TXD input | VI at VCC | –2 | 2 | µA | ||
| IIL | Low-level input current, TXD input | VI at 0 V | –50 | –10 | µA | ||
| IO(off) | Power-off TXD output current | VCC at 0 V, TXD at 5 V | 1 | µA | |||
| DRIVER (continued) | |||||||
| IOS(ss) | Short-circuit steady-state output current, dominant | VCANH = –12 V, CANL open (see Figure 12) | –105 | –72 | mA | ||
| VCANH = 12 V, CANL open (see Figure 12) | 0.36 | 1 | |||||
| VCANL = –12 V, CANH open (see Figure 12) | –1 | –0.5 | |||||
| VCANL = 12 V, CANH open (see Figure 12) | 71 | 105 | |||||
| VCANH = 0 V, CANL open, TXD = low, (see Figure 12) |
–100 | –70 | |||||
| VCANL = 32 V, CANH open, TXD = low, (see Figure 12 |
75 | 140 | |||||
| IOS(ss) | Short-circuit steady-state output current, recessive | –20 V ≤ VCANH ≤ 32 V, CANL open, TXD = high (see Figure 12) |
–15 | 15 | mA | ||
| –20 V ≤ VCANL ≤ 32 V, CANH open, TXD = high (see Figure 12) |
–15 | 15 | |||||
| CO | Output capacitance | See receiver input capacitance | |||||
| RECEIVER | |||||||
| VIT+ | Positive-going input threshold voltage | S = 0 V (see Table 1) | 800 | 900 | mV | ||
| VIT– | Negative-going input threshold voltage | S = 0 V (see Table 1) | 500 | 650 | mV | ||
| Vhys | Hysteresis voltage (VIT+ – VIT–) | 100 | 125 | mV | |||
| VOH | High-level output voltage | IO = –2 mA (see Figure 7) | 4 | 4.6 | V | ||
| VOL | Low-level output voltage | IO = 2 mA (see Figure 7) | 0.2 | 0.4 | V | ||
| II(off) | Power-off bus input current (unpowered bus leakage current) | CANH or CANL = 5 V, Other pin at 0 V, VCC at 0 V, TXD at 0 V |
165 | 250 | µA | ||
| IO(off) | Power-off RXD leakage current | VCC at 0 V, RXD at 5 V | 20 | µA | |||
| CI | Input capacitance to ground (CANH or CANL) | TXD at 3 V, VI = 0.4 sin (4E6πt) + 2.5 V |
13 | pF | |||
| CID | Differential input capacitance | TXD at 3 V, VI = 0.4 sin (4E6πt) | 6 | pF | |||
| RID | Differential input resistance | TXD at 3 V, S = 0 V | 30 | 80 | kΩ | ||
| RIN | Input resistance (CANH or CANL) | TXD at 3 V, S = 0 V | 15 | 30 | 40 | kΩ | |
| RI(m) | Input resistance matching [1 – RIN (CANH) / RIN (CANL))] × 100% |
V(CANH) = V(CANL) | –3% | 0% | 3% | ||
| S PIN | |||||||
| VIH | High-level input voltage, S input | 2 | V | ||||
| VIL | Low-level input voltage, S input | 0.8 | V | ||||
| IIH | High level input current | S at 2 V | 20 | 40 | 70 | µA | |
| IIL | Low level input current | S at 0.8 V | 5 | 20 | 30 | µA | |
| SPLIT (VREF) PIN | |||||||
| VO | Output voltage | –50 µA < IO < 50 µA (VREF) | 0.4 VCC | 0.5 VCC | 0.6 VCC | V | |
| –500 µA < IO < 500 µA (SPLIT) | 0.3 VCC | 0.5 VCC | 0.7 VCC | ||||
| ILKG | Leakage current, unpowered | VCC = 0 V, –12 V ≤ VSPLIT ≤ 12 V | –5 | 5 | µA | ||
(1) All typical values are at 25°C with a 5-V supply.
6.6 Power Dissipation Characteristics
over recommended operating conditions, TA = –40 to 125°C (unless otherwise noted)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| PD | Average power dissipation | VCC = 5 V, TJ = 27°C, RL = 60 Ω, S = 0 V, Input to TXD at 500 kHz, 50% duty cycle square wave, CL at RXD = 15 pF |
112 | mW | ||
| VCC = 5.5 V, TJ = 130°C, RL = 45 Ω, S = 0 V, Input to TXD at 500 kHz, 50% duty cycle square wave, CL at RXD = 15 pF |
170 | |||||
| Thermal shutdown temperature | 190 | °C | ||||
6.7 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SUPPLY | ||||||
| td(LOOP2) | Total loop delay, driver input to receiver output, dominant to recessive | S = 0 V (see Figure 10) | 90 | 230 | ns | |
| DEVICE SWITCHING CHARACTERISTICS | ||||||
| td(LOOP1) | Total loop delay, driver input to receiver output, recessive to dominant | S = 0 V (see Figure 10) | 90 | 230 | ns | |
| td(LOOP2) | Total loop delay, driver input to receiver output, dominant to recessive | S = 0 V (see Figure 10) | 90 | 230 | ns | |
| DRIVER SWITCHING CHARACTERISTICS | ||||||
| tPLH | Propagation delay time, low-to-high level output | S = 0 V (see Figure 5) | 25 | 65 | 120 | ns |
| tPHL | Propagation delay time, high-to-low level output | S = 0 V (see Figure 5) | 25 | 45 | 120 | ns |
| tr | Differential output signal rise time | S = 0 V (see Figure 5) | 25 | ns | ||
| tf | Differential output signal fall time | S = 0 V (see Figure 5) | 50 | ns | ||
| ten | Enable time from silent mode to normal mode and transmission of dominant | See Figure 8 | 1 | µs | ||
| t(dom) | Dominant time-out(1) | ↓VI (see Figure 11) | 300 | 450 | 700 | µs |
| RECEIVER SWITCHING CHARACTERISTICS | ||||||
| tPLH | Propagation delay time, low-to-high-level output | S = 0 V or VCC (see Figure 7) | 60 | 100 | 130 | ns |
| tPHL | Propagation delay time, high-to-low-level output | S = 0 V or VCC (see Figure 7) | 45 | 70 | 130 | ns |
| tr | Output signal rise time | S = 0 V or VCC (see Figure 7) | 8 | ns | ||
| tf | Output signal fall time | S = 0 V or VCC (see Figure 7) | 8 | ns | ||
(1) The TXD dominant time out, t(dom), disables the driver of the transceiver once the TXD has been dominant longer than t(dom), which releases the bus lines to recessive, preventing a local failure from locking the bus dominant. The driver may only transmit dominant again after TXD has been returned HIGH (recessive). Although this protects the bus from local faults, locking the bus dominant, it limits the minimum data rate possible. The CAN protocol allows a maximum of eleven successive dominant bits (on TXD) for the worst case, where five successive dominant bits are followed immediately by an error frame. This, along with the t(dom) minimum, limits the minimum bit rate. The minimum bit rate may be calculated by: Minimum Bit Rate = 11 / t(dom) = 11 bits / 300 µs = 37 kbps.
6.8 Typical Characteristics
| S = 0 V | RL = 60 Ω | TXD Input 125 kHz |
vs Free-Air Temperature