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DS90LV031AQML

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3V LVDS 四通道 CMOS 差分線路驅(qū)動(dòng)器

產(chǎn)品詳情

Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVTTL Output signal LVDS Rating Military Operating temperature range (°C) -55 to 125
Function Driver Protocols LVDS Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVTTL Output signal LVDS Rating Military Operating temperature range (°C) -55 to 125
CFP (NAD) 16 62.9285 mm2 9.91 x 6.35
  • High impedance LVDS outputs with power-off
  • Low differential skew
  • Low propagation delay
  • 3.3V power supply design
  • ±350 mV differential signaling
  • Low power dissipation
  • Interoperable with existing 5V LVDS devices
  • Compatible with IEEE 1596.3 SCI LVDS standard
  • Compatible with proposed TIA/EIA-644 LVDS standard
  • Pin compatible with DS26C31
  • Typical Rise/Fall times of 800pS.
  • Typical Tri-State Enable/Disable delays of less than 5nS.

All trademarks are the property of their respective owners. TRI-STATE is a trademark of Texas Instruments.

  • High impedance LVDS outputs with power-off
  • Low differential skew
  • Low propagation delay
  • 3.3V power supply design
  • ±350 mV differential signaling
  • Low power dissipation
  • Interoperable with existing 5V LVDS devices
  • Compatible with IEEE 1596.3 SCI LVDS standard
  • Compatible with proposed TIA/EIA-644 LVDS standard
  • Pin compatible with DS26C31
  • Typical Rise/Fall times of 800pS.
  • Typical Tri-State Enable/Disable delays of less than 5nS.

All trademarks are the property of their respective owners. TRI-STATE is a trademark of Texas Instruments.

The DS90LV031A is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV031A accepts low voltage TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 13 mW typical.

The EN and EN* inputs allow active Low or active High control of the TRI-STATE outputs. The enables are common to all four drivers. The DS90LV031A and companion line receiver (DS90LV032A) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.

The DS90LV031A is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV031A accepts low voltage TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 13 mW typical.

The EN and EN* inputs allow active Low or active High control of the TRI-STATE outputs. The enables are common to all four drivers. The DS90LV031A and companion line receiver (DS90LV032A) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.
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頂層文檔 類型 標(biāo)題 格式選項(xiàng) 下載最新的英語版本 日期
* 數(shù)據(jù)表 DS90LV031AQML 3V LVDS Quad CMOS Differential Line Driver 數(shù)據(jù)表 (Rev. A) 2013年 4月 17日
* SMD DS90LV031AQML SMD 5962-98651 2016年 6月 21日
更多文獻(xiàn)資料 Die D/S DS90LV031 MDS 3V LVDS Quad CMOS Differential Line Driver 2012年 9月 7日

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DS90LV047-48AEVM — DS90LV047-48AEVM 評(píng)估模塊

DS90LV047-48AEVM 是一款評(píng)估模塊 (EVM)，專為評(píng)估德州儀器 (TI) DS90LV047A 3V LVDS 四通道 CMOS 差動(dòng)線路驅(qū)動(dòng)器和 DS90LV048A 3V LVDS CMOS 差動(dòng)線路接收器的性能和功能而設(shè)計(jì)。借助此套件，用戶可在 DS90LV047A 和 DS90LV048A 的支持下快速評(píng)估輸出波形特性和信號(hào)完整性?？赏ㄟ^接頭引腳訪問 DS90LV047A 和 DS90LV048A 輸入和輸出，還有助于連接到實(shí)驗(yàn)室設(shè)備或用戶系統(tǒng)以進(jìn)行性能評(píng)估。
用戶指南: PDF
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仿真模型

DS90LV031A IBIS Model

SNLM020.ZIP (13 KB) - IBIS Model
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用戶指南: PDF
英語版 (Rev.A): PDF
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CFP (NAD) 16 Ultra Librarian

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