產(chǎn)品詳情

Protocols Analog Configuration Crosspoint/exchange Number of channels 24 Bandwidth (MHz) 200 Supply voltage (max) (V) 5.5 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 8 CON (typ) (pF) 19 OFF-state leakage current (max) (μA) 10 Ron (max) (mΩ) 12000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog Configuration Crosspoint/exchange Number of channels 24 Bandwidth (MHz) 200 Supply voltage (max) (V) 5.5 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 8 CON (typ) (pF) 19 OFF-state leakage current (max) (μA) 10 Ron (max) (mΩ) 12000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
SSOP (DL) 56 190.647 mm2 18.42 x 10.35 TSSOP (DGG) 56 113.4 mm2 14 x 8.1 TVSOP (DGV) 56 72.32 mm2 11.3 x 6.4
  • Member of the Texas Instruments Widebus? Family
  • Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 3 Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 8 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 5 μA Max)
  • VCC Operating Range From 4 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: PCI Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

Widebus is a trademark of Texas Instruments.
  • Member of the Texas Instruments Widebus? Family
  • Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 3 Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 8 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 5 μA Max)
  • VCC Operating Range From 4 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: PCI Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

Widebus is a trademark of Texas Instruments.

The SN74CBT16212C is a high-speed TTL-compatible FET bus-exchange switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT16212C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBT16212C operates as a 24-bit bus switch, or as a 12-bit bus-exchange that provides data exchanging between four signal ports. The select (S0, S1, S2) inputs control the data path of the bus-exchange switch. When the bus-exchange switch is ON, the A port is connected to the B port, allowing bidirectional data flow between ports. When the bus-exchange switch is disabled, a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, each select input should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The SN74CBT16212C is a high-speed TTL-compatible FET bus-exchange switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT16212C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state.

The SN74CBT16212C operates as a 24-bit bus switch, or as a 12-bit bus-exchange that provides data exchanging between four signal ports. The select (S0, S1, S2) inputs control the data path of the bus-exchange switch. When the bus-exchange switch is ON, the A port is connected to the B port, allowing bidirectional data flow between ports. When the bus-exchange switch is disabled, a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, each select input should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
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頂層文檔 類型 標題 格式選項 下載最新的英語版本 日期
* 數(shù)據(jù)表 SN74CBT16212C 數(shù)據(jù)表 (Rev. A) 2004年 1月 8日
選擇指南 Logic Guide (Rev. AC) PDF | HTML 2025年 11月 13日
應用手冊 選擇正確的德州儀器 (TI) 信號開關(guān) (Rev. E) PDF | HTML 英語版 (Rev.E) PDF | HTML 2022年 8月 5日
應用手冊 CBT-C、CB3T 和 CB3Q 信號開關(guān)系列 (Rev. C) PDF | HTML 英語版 (Rev.C) PDF | HTML 2022年 3月 11日
應用手冊 多路復用器和信號開關(guān)詞匯表 (Rev. B) 英語版 (Rev.B) PDF | HTML 2022年 3月 11日
應用簡報 利用關(guān)斷保護信號開關(guān)消除電源時序 (Rev. C) 英語版 (Rev.C) PDF | HTML 2021年 10月 21日
選擇指南 Little Logic Guide 2018 (Rev. G) 2018年 7月 6日
應用手冊 Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
選擇指南 邏輯器件指南 2014 (Rev. AA) 最新英語版本 (Rev.AC) PDF | HTML 2014年 11月 17日
選擇指南 小尺寸邏輯器件指南 (Rev. E) 最新英語版本 (Rev.G) 2012年 7月 16日
用戶指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
更多文獻資料 Digital Bus Switch Selection Guide (Rev. A) 2004年 11月 10日
應用手冊 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
用戶指南 Signal Switch Data Book (Rev. A) 2003年 11月 14日
應用手冊 Bus FET Switch Solutions for Live Insertion Applications 2003年 2月 7日

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仿真模型

SN74CBT16212C IBIS Model

SCDM056.ZIP (27 KB) - IBIS Model
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封裝 引腳 CAD 符號、封裝和 3D 模型
SSOP (DL) 56 Ultra Librarian
TSSOP (DGG) 56 Ultra Librarian
TVSOP (DGV) 56 Ultra Librarian

訂購和質(zhì)量

包含信息：
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息：
  • 制造廠地點
  • 封裝廠地點

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