SN74CBT16800C

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具有預(yù)充電輸出和 –2V 下沖保護(hù)的 5V、1:1 (SPST)、20 通道 FET 總線開關(guān)

產(chǎn)品詳情

Protocols Analog Configuration 1:1 SPST Number of channels 20 Bandwidth (MHz) 200 Supply voltage (max) (V) 5.5 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5.5 CON (typ) (pF) 15.5 OFF-state leakage current (max) (μA) 10 Ron (max) (mΩ) 12000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog Configuration 1:1 SPST Number of channels 20 Bandwidth (MHz) 200 Supply voltage (max) (V) 5.5 Ron (typ) (mΩ) 3000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5.5 CON (typ) (pF) 15.5 OFF-state leakage current (max) (μA) 10 Ron (max) (mΩ) 12000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
SSOP (DL) 48 164.358 mm2 15.88 x 10.35 TSSOP (DGG) 48 101.25 mm2 12.5 x 8.1
  • Member of the Texas Instruments Widebus? Family
  • Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
  • B-Port Outputs Are Precharged by Bias Voltage (BIASV) to Minimize Signal Distortion During Live Insertion and Hot-Plugging
  • Supports PCI Hot Plug
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 3 Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 5.5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 3 μA Max)
  • VCC Operating Range From 4 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: PCI Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

Widebus is a trademark of Texas Instruments.
  • Member of the Texas Instruments Widebus? Family
  • Undershoot Protection for Off-Isolation on A and B Ports Up To –2 V
  • B-Port Outputs Are Precharged by Bias Voltage (BIASV) to Minimize Signal Distortion During Live Insertion and Hot-Plugging
  • Supports PCI Hot Plug
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 3 Typical)
  • Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 5.5 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 3 μA Max)
  • VCC Operating Range From 4 V to 5.5 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Both Digital and Analog Applications: PCI Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating

Widebus is a trademark of Texas Instruments.

The SN74CBT16800C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT16800C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state. The device also precharges the B port to a user-selectable bias voltage (BIASV) to minimize live-insertion noise.

The SN74CBT16800C is organized as two 10-bit bus switches with separate output-enable (1OE\, 2OE\) inputs. It can be used as two 10-bit bus switches or as one 20-bit bus switch. When OE\ is low, the associated 10-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 10-bit bus switch is OFF, and a high-impedance state exists between the A and B ports. The B port is precharged to BIASV through the equivalent of a 10-k resistor when OE\ is high, or if the device is powered down (VCC = 0 V).

During insertion (or removal) of a card into (or from) an active bus, the card’s output voltage may be close to GND. When the connector pins make contact, the card’s parasitic capacitance tries to force the bus signal to GND, creating a possible glitch on the active bus. This glitching effect can be reduced by using a bus switch with precharged bias voltage (BIASV) of the bus switch equal to the input threshold voltage level of the receivers on the active bus. This method will ensure that any glitch produced by insertion (or removal) of the card will not cross the input threshold region of the receivers on the active bus, minimizing the effects of live-insertion noise.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBT16800C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT16800C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state. The device also precharges the B port to a user-selectable bias voltage (BIASV) to minimize live-insertion noise.

The SN74CBT16800C is organized as two 10-bit bus switches with separate output-enable (1OE\, 2OE\) inputs. It can be used as two 10-bit bus switches or as one 20-bit bus switch. When OE\ is low, the associated 10-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 10-bit bus switch is OFF, and a high-impedance state exists between the A and B ports. The B port is precharged to BIASV through the equivalent of a 10-k resistor when OE\ is high, or if the device is powered down (VCC = 0 V).

During insertion (or removal) of a card into (or from) an active bus, the card’s output voltage may be close to GND. When the connector pins make contact, the card’s parasitic capacitance tries to force the bus signal to GND, creating a possible glitch on the active bus. This glitching effect can be reduced by using a bus switch with precharged bias voltage (BIASV) of the bus switch equal to the input threshold voltage level of the receivers on the active bus. This method will ensure that any glitch produced by insertion (or removal) of the card will not cross the input threshold region of the receivers on the active bus, minimizing the effects of live-insertion noise.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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頂層文檔 類型 標(biāo)題 格式選項(xiàng) 下載最新的英語版本 日期
* 數(shù)據(jù)表 SN74CBT16800C 數(shù)據(jù)表 (Rev. C) 2003年 10月 15日
選擇指南 Logic Guide (Rev. AC) PDF | HTML 2025年 11月 13日
應(yīng)用手冊(cè) 選擇正確的德州儀器 (TI) 信號(hào)開關(guān) (Rev. E) PDF | HTML 英語版 (Rev.E) PDF | HTML 2022年 8月 5日
應(yīng)用手冊(cè) CBT-C、CB3T 和 CB3Q 信號(hào)開關(guān)系列 (Rev. C) PDF | HTML 英語版 (Rev.C) PDF | HTML 2022年 3月 11日
應(yīng)用手冊(cè) 多路復(fù)用器和信號(hào)開關(guān)詞匯表 (Rev. B) 英語版 (Rev.B) PDF | HTML 2022年 3月 11日
應(yīng)用簡報(bào) 利用關(guān)斷保護(hù)信號(hào)開關(guān)消除電源時(shí)序 (Rev. C) 英語版 (Rev.C) PDF | HTML 2021年 10月 21日
選擇指南 Little Logic Guide 2018 (Rev. G) 2018年 7月 6日
應(yīng)用手冊(cè) Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
選擇指南 邏輯器件指南 2014 (Rev. AA) 最新英語版本 (Rev.AC) PDF | HTML 2014年 11月 17日
選擇指南 小尺寸邏輯器件指南 (Rev. E) 最新英語版本 (Rev.G) 2012年 7月 16日
用戶指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
更多文獻(xiàn)資料 Digital Bus Switch Selection Guide (Rev. A) 2004年 11月 10日
應(yīng)用手冊(cè) Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
用戶指南 Signal Switch Data Book (Rev. A) 2003年 11月 14日
應(yīng)用手冊(cè) Bus FET Switch Solutions for Live Insertion Applications 2003年 2月 7日

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仿真模型

SN74CBT16800C IBIS Model (Rev. A)

SCDM023A.ZIP (27 KB) - IBIS Model
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SSOP (DL) 48 Ultra Librarian
TSSOP (DGG) 48 Ultra Librarian

訂購和質(zhì)量

包含信息：
  • RoHS
  • REACH
  • 器件標(biāo)識(shí)
  • 引腳鍍層/焊球材料
  • MSL 等級(jí)/回流焊峰值溫度
  • MTBF/時(shí)基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測(cè)
包含信息：
  • 制造廠地點(diǎn)
  • 封裝廠地點(diǎn)

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