SN74TVC16222A

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5V、22 通道電壓鉗位

產(chǎn)品詳情

Configuration 1:1 SPST Number of channels 23 Power supply voltage - single (V) 0.8, 1.2, 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 10 CON (typ) (pF) 12 Bandwidth (MHz) 100 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (A) 0.064 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
Configuration 1:1 SPST Number of channels 23 Power supply voltage - single (V) 0.8, 1.2, 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 10 CON (typ) (pF) 12 Bandwidth (MHz) 100 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (A) 0.064 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
SSOP (DL) 48 164.358 mm2 15.88 x 10.35 TSSOP (DGG) 48 101.25 mm2 12.5 x 8.1 TVSOP (DGV) 48 62.08 mm2 9.7 x 6.4
  • Member of the Texas Instruments Widebus? Family
  • Designed to Be Used in Voltage-Limiting Applications
  • 6.5- On-State Connection Between Ports A and B
  • Flow-Through Pinout for Ease of Printed Circuit Board Trace Routing
  • Direct Interface With GTL+ Levels
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Widebus and TI are trademarks of Texas Instruments.
  • Member of the Texas Instruments Widebus? Family
  • Designed to Be Used in Voltage-Limiting Applications
  • 6.5- On-State Connection Between Ports A and B
  • Flow-Through Pinout for Ease of Printed Circuit Board Trace Routing
  • Direct Interface With GTL+ Levels
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Widebus and TI are trademarks of Texas Instruments.

The SN74TVC16222A provides 23 parallel NMOS pass transistors with a common gate. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device can be used as a 22-bit switch, with the gates cascaded together to a reference transistor. The low-voltage side of each pass transistor is limited to a voltage set by the reference transistor. This is done to protect components with inputs that are sensitive to high-state voltage-level overshoots. (See Application Information in this data sheet.)

All of the transistors in the TVC array have the same electrical characteristics; therefore, any one of them can be used as the reference transistor. Because, within the device, the characteristics from transistor to transistor are equal, the maximum output high-state voltage (VOH) is approximately the reference voltage (VREF), with minimal deviation from one output to another. This is a benefit of the TVC solution over discrete devices. Because the fabrication of the transistors is symmetrical, either port connection of each bit can be used as the low-voltage side, and the I/O signals are bidirectional through each FET.

The SN74TVC16222A provides 23 parallel NMOS pass transistors with a common gate. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device can be used as a 22-bit switch, with the gates cascaded together to a reference transistor. The low-voltage side of each pass transistor is limited to a voltage set by the reference transistor. This is done to protect components with inputs that are sensitive to high-state voltage-level overshoots. (See Application Information in this data sheet.)

All of the transistors in the TVC array have the same electrical characteristics; therefore, any one of them can be used as the reference transistor. Because, within the device, the characteristics from transistor to transistor are equal, the maximum output high-state voltage (VOH) is approximately the reference voltage (VREF), with minimal deviation from one output to another. This is a benefit of the TVC solution over discrete devices. Because the fabrication of the transistors is symmetrical, either port connection of each bit can be used as the low-voltage side, and the I/O signals are bidirectional through each FET.
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SSOP (DL) 48 Ultra Librarian
TSSOP (DGG) 48 Ultra Librarian
TVSOP (DGV) 48 Ultra Librarian

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