TS5A26542

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具有輸入邏輯轉(zhuǎn)換功能的 0.75Ω 導(dǎo)通狀態(tài)電阻、5V、2:1 (SPDT)、2 通道模擬開關(guān)

產(chǎn)品詳情

Configuration 2:1 SPDT Number of channels 2 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 0.5 CON (typ) (pF) 130 ON-state leakage current (max) (μA) 0.2 Supply current (typ) (μA) 0.001 Bandwidth (MHz) 43 Operating temperature range (°C) -40 to 85 Features 1.8-V compatible control inputs, Break-before-make Input/output continuous current (max) (A) 0.45 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
Configuration 2:1 SPDT Number of channels 2 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 0.5 CON (typ) (pF) 130 ON-state leakage current (max) (μA) 0.2 Supply current (typ) (μA) 0.001 Bandwidth (MHz) 43 Operating temperature range (°C) -40 to 85 Features 1.8-V compatible control inputs, Break-before-make Input/output continuous current (max) (A) 0.45 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
DSBGA (YZT) 12 3.9375 mm2 2.25 x 1.75
  • Specified Break-Before-Make Switching
  • Low ON-State Resistance (0.75 Max)
  • Control Inputs Reference to VIO
  • Low Charge Injection
  • Excellent ON-State Resistance Matching
  • Low Total Harmonic Distortion (THD)
  • 2.25-V to 5.5-V Power Supply (V+)
  • 1.65-V to 1.95-V Logic Supply (VIO)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
    • 300-V Machine Model (A115-A)
  • COM Inputs
    • 8000-V Human-Body Model
      (A114-B, Class II)
    • ±15-kV Contact Discharge (IEC 61000-4-2)
  • APPLICATIONS
    • Cell Phones
    • PDAs
    • Portable Instrumentation

NanoFree Is a trademark of Texas Instruments
  • Specified Break-Before-Make Switching
  • Low ON-State Resistance (0.75 Max)
  • Control Inputs Reference to VIO
  • Low Charge Injection
  • Excellent ON-State Resistance Matching
  • Low Total Harmonic Distortion (THD)
  • 2.25-V to 5.5-V Power Supply (V+)
  • 1.65-V to 1.95-V Logic Supply (VIO)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
    • 300-V Machine Model (A115-A)
  • COM Inputs
    • 8000-V Human-Body Model
      (A114-B, Class II)
    • ±15-kV Contact Discharge (IEC 61000-4-2)
  • APPLICATIONS
    • Cell Phones
    • PDAs
    • Portable Instrumentation

NanoFree Is a trademark of Texas Instruments

The TS5A26542 is a dual single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V to 5.5 V. The device offers a low ON-state resistance with an excellent channel-to-channel ON-state resistance matching, and the break-before-make feature to prevent signal distortion during the transferring of a signal from one path to the another. The device has excellent total harmonic distortion (THD) performance and consumes very low power. These features make this device suitable for portable audio applications.

The TS5A26542 has a separate logic supply pin (VIO) that operates from 1.65 V to 1.95 V. VIO powers the control circuitry, which allows the TS5A26542 to be controlled by 1.8-V signals.

The TS5A26542 is a dual single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V to 5.5 V. The device offers a low ON-state resistance with an excellent channel-to-channel ON-state resistance matching, and the break-before-make feature to prevent signal distortion during the transferring of a signal from one path to the another. The device has excellent total harmonic distortion (THD) performance and consumes very low power. These features make this device suitable for portable audio applications.

The TS5A26542 has a separate logic supply pin (VIO) that operates from 1.65 V to 1.95 V. VIO powers the control circuitry, which allows the TS5A26542 to be controlled by 1.8-V signals.
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* 數(shù)據(jù)表 0.75-Ohm Dual SPDT Analog Switch With Input Logic Translation 數(shù)據(jù)表 (Rev. E) 2009年 12月 16日
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