SLVSBW9C April 2013 – December 2015 DRV8832-Q1
PRODUCTION DATA.
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
The DRV8832-Q1 is capable of entering a low-power sleep mode by bringing both of the INx control inputs logic low. The outputs will be disabled Hi-Z.
To exit the sleep mode, bring either or both of the INx inputs logic high. This will enable the H-bridges. When exiting the sleep mode, the FAULTn pin will pulse low.