ZHCSDB8A February   2014  – August 2014 LP8754

PRODUCTION DATA.  

1. 1 特性
2. 2 應(yīng)用
3. 3 說(shuō)明
4. 4 修訂歷史記錄
5. 5 Pin Configuration and Functions
6. 6 Specifications
   1. 6.1  Absolute Maximum Ratings
   2. 6.2  ESD Ratings
   3. 6.3  Recommended Operating Conditions
   4. 6.4  Thermal Information
   5. 6.5  General Electrical Characteristics
   6. 6.6  6-Phase Buck Electrical Characteristics
   7. 6.7  6-Phase Buck System Characteristics
   8. 6.8  Protection Features Characteristics
   9. 6.9  I2C Serial Bus Timing Parameters
   10. 6.10 Typical Characteristics
7. 7 Detailed Description
   1. 7.1 Overview
      1. 7.1.1 Buck Information
   2. 7.2 Functional Block Diagram
   3. 7.3 Features Descriptions
      1. 7.3.1 Multi-Phase DC-DC Converters
         1. 7.3.1.1 Multi-Phase Operation and Phase-Shedding
         2. 7.3.1.2 Transitions Between Low-Power PFM, PFM, and PWM Modes
         3. 7.3.1.3 Buck Converter Load Current
         4. 7.3.1.4 Spread Spectrum Mode
      2. 7.3.2 Power-Up and Output Voltage Sequencing
      3. 7.3.3 Device Reset Scenarios
      4. 7.3.4 Diagnosis and Protection Features
         1. 7.3.4.1 Warnings for Diagnosis (No Power Down)
            1. 7.3.4.1.1 Short-Circuit Protection (SCP)
            2. 7.3.4.1.2 Power Good Monitoring
            3. 7.3.4.1.3 Thermal Warnings
         2. 7.3.4.2 Faults (Fault State and Fast Power Down)
            1. 7.3.4.2.1 Undervoltage Lockout (UVLO)
            2. 7.3.4.2.2 Overvoltage Protection (OVP)
            3. 7.3.4.2.3 Thermal Shutdown (THSD)
   4. 7.4 Device Functional Modes
   5. 7.5 Programming
      1. 7.5.1 I2C-Compatible Interface
         1. 7.5.1.1 Data Validity
         2. 7.5.1.2 Start and Stop Conditions
         3. 7.5.1.3 Transferring Data
         4. 7.5.1.4 I2C-Compatible Chip Address
         5. 7.5.1.5 Auto-Increment Feature
   6. 7.6 Register Maps
      1. 7.6.1  Register Descriptions
      2. 7.6.2  VSET_B0
      3. 7.6.3  FPWM
      4. 7.6.4  BUCK0_CTRL
      5. 7.6.5  BUCK1_CTRL
      6. 7.6.6  BUCK2_CTRL
      7. 7.6.7  BUCK3_CTRL
      8. 7.6.8  BUCK4_CTRL
      9. 7.6.9  BUCK5_CTRL
      10. 7.6.10 FLAGS_0
      11. 7.6.11 FLAGS_1
      12. 7.6.12 INT_MASK_0
      13. 7.6.13 GENERAL
      14. 7.6.14 RESET
      15. 7.6.15 DELAY_BUCK0
      16. 7.6.16 CHIP_ID
      17. 7.6.17 PFM_LEV_B0
      18. 7.6.18 PHASE_LEV_B0
      19. 7.6.19 SEL_I_LOAD
      20. 7.6.20 LOAD_CURR
      21. 7.6.21 INT_MASK_2
8. 8 Application and Implementation
   1. 8.1 Application Information
   2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
         1. 8.2.2.1 Inductor Selection
         2. 8.2.2.2 Input Capacitor Selection
         3. 8.2.2.3 Output Capacitor Selection
         4. 8.2.2.4 LDO Capacitor Selection
         5. 8.2.2.5 VIOSYS Capacitor Selection
      3. 8.2.3 Application Curves
9. 9 Power Supply Recommendations
10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
11. 11器件和文檔支持
    1. 11.1 器件支持
       1. 11.1.1 第三方產(chǎn)品免責(zé)聲明
    2. 11.2 文檔支持
       1. 11.2.1 相關(guān)文檔　
    3. 11.3 商標(biāo)
    4. 11.4 靜電放電警告
    5. 11.5 術(shù)語(yǔ)表
12. 12機(jī)械封裝和可訂購(gòu)信息